Transition Aware Scheduling: Increasing Continuous Idle Periods in Resource Units
K. Ananda Vardhan and Y.N. Srikant

IISc-CSA-TR-2004-12
(October 2004)

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Filed on October 18, 2004
Updated on November 17, 2004


Static power consumption has become a significant factor of the total
power consumption in a system. Circuit level switching techniques reduce
static power consumption by exploiting idle periods in processor components and
placing them into low power modes or turning them off completely. In
this paper, we propose a modified automaton-based list scheduling
technique that augments the circuit level techniques by reducing the
number of transitions between power modes, thereby increasing the
of idle periods in resource units. Our scheduler uses a global resource
usage vector and the usage vector of the last issued instruction(s) to select
instruction(s) from the ready list such that resource units common to the
last issued instruction and the selected instruction(s) are continuously active
without creating a transition into low power mode. We estimate the power
consumed in resource units using an energy model parameterized by the
number of idle cycles, active cycles and transitions. We have implemented our
algorithm in gcc and our simulations for different classes of benchmarks
using an ARM simulator, with single and multi issue, indicate an average energy
savings of 4%-15% in resource units with an average 0.25%-0.8% increase in the
number of execution cycles.


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