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DTEND:20220603T120000Z
UID:88f5a08a3c0ac64480eb247bad114d55-288
DTSTAMP:19700101T120015Z
DESCRIPTION:Wafer-Scale processing for AI and HPC
URL;VALUE=URI:https://www.csa.iisc.ac.in/newweb/event/288/wafer-scale-processing-for-ai-and-hpc/
SUMMARY:As ML algorithms and network architectures evolve rapidly to improve performance for variety of applications, some trends are very clear: larger models are often highly effective, compute and memory requirements are growing exponentially, scale-out based approaches are yielding sub-linear results, deep expertise is needed to achieve high utilization on scale-out. These trends motivate for Wafer-Scale chip with distributed memory architecture   and a domain specific ISA for ML applications. It turns out that this architecture can also offer compelling performance advantage on some HPC applications. This talk covers some of the key details of Cerebras Wafer-Scale Engine (WSE) based accelerator and how it accelerates AI and HPC applications.
DTSTART:20220603T120000Z
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