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DTEND:20230120T120000Z
UID:6feb5d28d3cce91ead7afae27c231155-400
DTSTAMP:19700101T120016Z
DESCRIPTION:Energy-efficient 2.5D Architectures with Processing-in-memory for Machine Learning Applications
URL;VALUE=URI:https://www.csa.iisc.ac.in/newweb/event/400/energy-efficient-2-5d-architectures-with-processing-in-memory-for-machine-learning-applications/
SUMMARY:Processing-in-memory (PIM) is a promising technique to accelerate deep learning (DL) workloads. Emerging DL workloads (e.g., ResNet with 152 layers) consist of millions of parameters, which increase the area and fabrication cost of monolithic PIM accelerators. The fabrication cost challenge can be addressed by 2.5-D systems integrating multiple PIM chiplets connected through a network-on-package (NoP). However, server-scale scenarios simultaneously execute multiple compute-heavy DL workloads, leading to significant inter-chiplet data volume. State-of-the-art NoP architectures proposed in the literature do not consider the nature of DL workloads. In this talk, we will discuss a novel server-scale 2.5-D manycore architecture that accounts for the traffic characteristics of DL applications. Comprehensive experimental evaluations with different system sizes as well as diverse emerging DL workloads demonstrate that the architecture achieves significant performance and energy consumption improvements with much lower fabrication cost than state-of-the-art NoP topologies.
DTSTART:20230120T120000Z
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