Department of Computer Science and Automation Department of Computer Science and Automation, IISc, Bangalore, India Indian Institute of Science
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UPCOMING SEMINARS

Series:
Title: A Moore's Law Forecast: Cloudy with a strong chance of ML

  • Speaker: Dr. Partha Ranganathan
                   Vice President and Technical Fellow at Google
  • Faculty Advisor: Arkaprava Basu
  • Date and Time: Thursday, September 01, 2022, 7:30 PM
  • Venue: Microsoft Teams - https://teams.microsoft.com/l/meetup-join/19%3ameeting_MTQ1MzNjY2UtYWIyOC00MmVmLWE0NDQtNmE4Njk1Nzk2Njk2%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%2282f39501-c5b2-4bfb-87c3-f17ca74c00b6%22%7d

Abstract
Teams talk link: https://tinyurl.com/mvbjcsfu

Growing volumes of data, smarter edge devices, and new, diverse workloads are causing demand for computing to grow at phenomenal rates. At the same time, Moore's law is slowing down, stressing traditional assumptions around cheaper and faster systems every year. How do you respond to the current opportunities, exponentially increasing compute capacity at a fixed cost? Specifically, we will discuss the innovations and trends shaping the future computing landscape -- more “out-of-the-box” designs that consider the entire datacenter as a computer for custom silicon and software-defined infrastructure, broader open innovation ecosystems, and a whole lot of machine learning (ML).

Speaker Bio:
Partha Ranganathan is currently a VP, technical Fellow at Google where he is the area technical lead for hardware and datacenters, designing systems at scale. Prior to this, he was a HP Fellow and Chief Technologist at Hewlett Packard Labs where he led their research on systems and data centers. Partha has worked on several interdisciplinary systems projects with broad impact on both academia and industry, including widely-used innovations in energy-aware user interfaces, heterogeneous multi-cores, power-efficient servers, accelerators, and disaggregated and data-centric data centers. He has published extensively (including being the co-author on the popular "Datacenter as a Computer" textbook), is a co-inventor on more than 100 patents, and has been recognized with numerous awards. He has been named a top-15 enterprise technology rock star by Business Insider, one of the top 35 young innovators in the world by MIT Tech Review, and is a recipient of the ACM SIGARCH Maurice Wilkes award, Rice University's Outstanding Young Engineering Alumni award, and the IIT Madras distinguished alumni award. He is also a Fellow of the IEEE and ACM, and is currently on the board of directors for OpenCompute

Host Faculty: Arkaprava Basu

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Series: IISc MSR Theory Seminar Talk - ONLINE
Title: Decentralized Bandits in Matching Markets

  • Speaker: Karthik Abhinav
                   research scientist
                   Facebook
  • Date and Time: Thursday, August 18, 2022, 6:00 PM
  • Venue: Microsoft Teams - ON-LINE

Abstract
In this talk we introduce the problem of decentralized bandits in matching markets, a model inspired by modern recommendation systems. We design algorithms for regret minimization in the two-sided matching market with one-sided bandit feedback. First, for general markets, for any ε>0, we design an algorithm that achieves a O(log1+ε(T)) regret t o the agent-optimal stable matching, with unknown time horizon T. Then, we look at a series of generalized assumptions on the market and provide algorithms that achieve the agent-optimal regret bound of O(log T).

We first start with the canonical serial dictatorship setting with uniform valuations and then extend it to markets satisfying uniqueness consistency -- markets where leaving participants dont alter the original stable matching. We propose a phase-based algorithm, wherein each phase, besides deleting the globally communicated dominated arms the agents locally delete arms with which they collide often. This local deletion is pivotal in breaking deadlocks arising from rank heterogeneity of agents across arms. These phase based algorithms are ideal for deploying in a semi-online/batch setting that are common in large scale production systems.

For more details please visit: https://www.csa.iisc.ac.in/iisc-msr-seminar/

Microsoft teams link:

https://teams.microsoft.com/l/meetup-join/19%3ameeting_ZGE3NDg5NzktMWQ0Zi00MzFmLTg5OTgtMTMyYWM4MWQyYjI2%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%227c84465e-c38b-4d7a-9a9d-ff0dfa3638b3%22%7d

Host Faculty: Rahul Madhavan and Rameesh Paul

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Series: Department Seminar
Title: Reasoning about congestion control behavior

  • Speaker: Venkat Arun, MIT, USA
  • Date and Time: Thursday, August 18, 2022, 2:30 PM
  • Venue: CSA Class (Room No. 252, First Floor)

Abstract
The diversity of paths on the Internet makes it difficult for designers and operators to confidently deploy new congestion control algorithms (CCAs) without extensive real-world experiments, but such capabilities are not available to most of the networking community. And even when they are available, understanding why a CCA under-performs by trawling through massive amounts of statistical data from network connections is challenging. The history of congestion control is replete with many examples of surprising and unanticipated behaviors unseen in simulation but observed on real-world paths. In this talk I will present a simple mathematical approach to enable us to reason about congestion control behavior under such complex network phenomena. We use this approach in two ways.

First, we develop CCAC (Congestion Control Anxiety Controller), a tool that uses formal verification to establish certain properties of CCAs. It is able to prove hypotheses about CCAs or generate counterexamples for invalid hypotheses. With CCAC, a designer can not only gain greater confidence prior to deployment to avoid unpleasant surprises, but can also use the counterexamples to iteratively improve their algorithm. We have modeled additive-increase/multiplicative-decrease (AIMD), Copa, and BBR with CCAC, and describe some surprising results from the exercise.

Second, we tried designing a CCA that works under our network model. To our surprise, CCAC showed that all CCAs we tried suffer from starvation, an extreme form of unfairness. Further, starvation occurred under network conditions that are common on the internet. Motivated by this, we proved an impossibility result: current methods to develop delay-bounding CCAs cannot always avoid starvation. We identify a key property that makes current CCAs susceptible to starvation: when run on a path with a fixed bottleneck rate, these CCAs converge to a small delay range in equilibrium. Starvation may occur when such a CCA runs on paths that have non-congestive network delay variations due to real-world factors such as ACK aggregation and end-host scheduling. These can cause the CCA to misestimate capacity and starve.

Finally I will talk about how these techniques may be used understand the performance of other heuristics used in computer systems in a mathematically precise and practically relevant way.

Speaker Bio:
Venkat Arun is a sixth year PhD student at CSAIL, MIT working with Hari and Mohammad. He has worked on congestion control. His CCA, Copa (NSDI'18), is being used in production at Facebook. His work on formally verifying congestion control is the subject of this talk (SIGCOMM'21, SIGCOMM'22). He also worked on RFocus (NSDI'20), a radio system that makes it practical to have single communication links use thousands of antennas by moving beamforming functions from the endpoints to the environment. Each "antenna" here is passive and emits no power of its own. Their simplicity enables the scale. He will be on the industry research and academic job market this year. Website: https://people.csail.mit.edu/venkatar/

Host Faculty: R Govindarajan

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PAST SEMINARS

Series: IISc MSR Seminar Series - ONLINE
Title: Public Randomness Extraction with Ephemeral Roles and Worst-Case Corruptions

  • Speaker: João Ribeiro
                   Post Doctoral Fellow
                   Computer Science Department
                   Carnegie Mellon University
                   USA
  • Date and Time: Thursday, August 11, 2022, 6:00 PM
  • Venue: Microsoft Teams - ON-LINE

Abstract
We distill a simple information-theoretic model for randomness extraction motivated by the task of generating publicly verifiable randomness in blockchain settings and which is closely related to You-Only-Speak-Once (YOSO) protocols (CRYPTO 2021). With the goal of avoiding denial-of-service attacks, parties speak only once and in sequence by broadcasting a public value and forwarding secret values to future parties. Additionally, an unbounded adversary can corrupt any chosen subset of at most t parties. In contrast, existing YOSO protocols only handle random corruptions. As a notable example, considering worst-case corruptions allows us to reduce trust in the role assignment mechanism, which is assumed to be perfectly random in YOSO. We study the maximum corruption threshold t which allows for unconditional randomness extraction in our model:

– With respect to feasibility, we give protocols for t corruptions and n = 6t + 1 or n = 5t parties depending on whether the adversary learns secret values forwarded to corrupted parties immediately once they are sent or only once the corrupted party is executed, respectively. Both settings are motivated by practical implementations of secret value forwarding. To design such protocols, we go beyond the committee-based approach that is sufficient for random corruptions in YOSO but turns out to be sub-optimal for chosen corruptions.

– To complement our protocols, we show that low-error randomness extraction is impossible with corruption threshold t and n ≤ 4t parties in both settings above. This also provides a separation between chosen and random corruptions, since the latter allows for randomness extraction with close to n/2 random corruptions.

Based on joint work with Jesper Buus Nielsen and Maciej Obremski.

For more details: https://www.csa.iisc.ac.in/iisc-msr-seminar/

Microsoft teams link:

https://teams.microsoft.com/l/meetup-join/19%3ameeting_ZGE3NDg5NzktMWQ0Zi00MzFmLTg5OTgtMTMyYWM4MWQyYjI2%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%227c84465e-c38b-4d7a-9a9d-ff0dfa3638b3%22%7d

Host Faculty: Rahul Madhavan and Rameesh Paul

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Series: M.Tech (Research)Thesis Defence -ONLINE
Title: Neural Approaches for Natural Language Query Answering over Source Code

  • Speaker: Ms. Madhurima Mandal
                   M.Tech (Research) student
                   Dept. of C.S.A
                   IISc
  • Faculty Advisor: Prof. Shirish K Shevade
  • Date and Time: Friday, August 05, 2022, 11:30 AM
  • Venue: Microsoft Teams - ON-LINE

Abstract
During software development, developers need to ensure that the developed code is bug-free and the best coding practices are followed during the code development process. To guarantee this, the developers require answers to queries about specific aspects of the code relevant to the development. Powerful code-query languages such as CodeQL have been developed for this purpose. Use of such code-query languages, however, requires expertise in writing formal queries. For each separate query, one needs to write several lines in a code-query language.

To remedy these problems, we propose to represent each query by a natural language phrase and answer such queries using neural networks. We aim to perform model training such that a single model can answer multiple queries as opposed to writing separate formal queries for each task. Such a model can answer these queries against unseen code. With this motivation, we introduce the novel NlCodeQA dataset. It includes 171,346 labeled examples where each input consists of a natural language query and a code snippet. The labels are answer spans in the input code snippet with respect to the input query. State-of-the-art BERT-style neural architectures were trained using the NlCodeQA data. Preliminary experimental results show that the proposed model achieves the exact match accuracy of 86.30%.

The proposed use of natural language query and neural models for query understanding will help increase the productivity of software developers and pave the way for designing machine learning based code analysis tools that can complement the existing code analysis systems for complex code queries that are either hard or expensive to represent using a formal query language.

Microsoft teams link:

https://teams.microsoft.com/l/meetup-join/19%3ameeting_Mjc5NGI1OWItMmI4NC00MzAyLTgxMzAtM2IyMTA5YzhiZGE1%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%229c3e2bfe-1b0f-4d7b-a589-832878069dc6%22%7d

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Series: M.Tech (Research) Thesis Defense
Title: Performance Characterization and Optimizations of Traditional ML Applications

  • Speaker: Harsh Kumar
  • Faculty Advisor: R Govindarajan
  • Date and Time: Thursday, July 28, 2022, 11:00 AM
  • Venue: CSA Seminar Hall (Room No. 254, First Floor)

Abstract
In recent years, Deep Learning based methods have attracted a lot of attention and research – both from statistics and systems. These traditional algorithms are easily explainable and are pretty fast for smaller and medium-size datasets. However, in large organizations, massive datasets spanning a couple of million sample points are not rare. A lot of research has been done to design or adapt these traditional algorithms for such massive datasets. However, we find an apparent lack of a detailed systems-based study for these algorithms in the context of huge datasets.

In this work, we study the systems behavior and bottlenecks for these algorithms in the context of huge training datasets. As part of our work, we start with a performance characterization study, identify critical performance bottlenecks experienced by these applications, and then measure the reduction in performance stalls along with apparent benefits in terms of speedup after applying some of the well-known optimizations at the levels of caches, main memory, and computation. More specifically, we apply optimizations such as (i) software prefetching to improve cache performance and (ii) data layout and computation reordering optimizations to improve locality in DRAM accesses and show the performance benefits they can bring in these applications. Last, we evaluate the sensitivity of predictions and the improvement in performance when the computations on precise (float/double) inner variables are interpreted as relatively low-cost integer operations. These optimizations are implemented as modification on the well-known scikit-learn library.

We evaluate the impact of the proposed optimizations using a combination of simulation and execution on real system and performance measurement. Our optimizations result in performance benefits varying from 5% -- 27% on different ML applications.

This is an online defense. The Teams meeting link for this is: https://tinyurl.com/HarshKumarDefense

Host Faculty: R Govindarajan

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Series: Department Seminar
Title: Why we could not prove SETH hardness of CVP for even norms!

  • Speaker: Dr. Rajendra Kumar,
                   Research fellow,
                   Divesh Aggarwals group,
                   Center for Quantum Technologies, NUS
  • Date and Time: Thursday, July 28, 2022, 10:00 AM
  • Venue: CSA Conference Room, (Room No. 311, Second Floor)

Abstract
Lattice-based cryptographic schemes have generated much interest in recent years. Their security relies on the computational hardness of problems over geometric objects called lattices. These problems have been used to build advanced cryptographic primitives such as fully homomorphic encryption, and they are believed to be resistant to quantum attacks. Given the recent advancement in quantum technologies, many institutes such as the National Institute of Standards and Technology (NIST) and European Telecommunications Standards Institute (ETSI) have initiated a process for standardization and deployment of lattice-based schemes widely over the next few years. Recently, NIST has announced lattice-based candidates (Kyber and Dilithium) as primary algorithms for implementation.

The security of the lattice-based cryptosystem schemes crucially relies on the assumption that the best-known algorithms for the corresponding lattice problems cannot be significantly improved. Understanding the fine-grained hardness of these problems is one way of getting more confidence in these assumptions.

In this talk, I will discuss the fine-grained hardness of the lattice problems in different p-norms. Mainly, I will focus on the recent joint work with Divesh Aggarwal. Under a complexity-theoretic assumption, we show that getting any SETH-hardness for the lattice problems in the even norm is impossible by a poly-time reduction from k-SAT to CVP. We also show similar impossibility results for SUBSET-SUM and many other problems.

Speaker Bio:
Rajendra Kumar is a Research fellow in Divesh Aggarwals group at the Center for Quantum Technologies, NUS. He completed his Ph.D. under the Joint degree program of the Indian Institute of Technology, Kanpur, and the National University of Singapore. He is broadly interested in algorithms and cryptography, with special interests in lattice algorithms and reductions. More information can be found on his homepage: https://sites.google.com/view/rajendrak/.

Host Faculty: Prof. Bhavana Kanukurthi

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Series: Ph.D. Colloquium
Title: Comparative Analysis of Topological Structures

  • Speaker: Raghavendra GS
                   Ph.D (Engg.) student
                   Dept. of CSA
                   IISc.
  • Faculty Advisor: Prof. Vijay Natarajan
  • Date and Time: Monday, July 25, 2022, 2:30 PM
  • Venue: CSA Seminar Hall (Room No. 254, First Floor)

Abstract
Measuring scientific processes result in a set of scalar functions (scalar fields) which may be related temporally, be part of an ensemble, or unrelated. Overall understanding and visualization of scientific processes require the study of individual fields and, more importantly, the development of methods to compare them meaningfully. In this thesis, we focus on the problem of designing meaningful measures to compare scalar fields by comparing their abstract representations called topological structures. We emphasize on intuitive and practical measures with useful properties and applications.

The first part of the thesis deals with comparing a topological structure called the merge tree. We propose two global comparison measures, both based on tree edit distances. The first measure OTED is based on the assumption that merge trees are ordered rooted trees. Upon finding that there is no meaningful way of imposing such an order, we propose a second measure called MTED for comparing unordered rooted trees. We propose intuitive cost models and prove that MTED is a metric. We also provide various applications such as shape comparison, periodicity detection, symmetry detection, temporal summarization, and an analysis of the effects of sub-sampling /smoothing of on the topology of the scalar field.

The second part deals with a local comparison measure LMTED for merge trees that supports the comparison of substructures of scalar fields, thus facilitating hierarchical or multi-scale analysis and alleviating some drawbacks of MTED. We propose a dynamic programming algorithm, prove that LMTED is a metric and also provide applications such as symmetry detection in multiple scales, a finer level analysis of sub-sampling effects, an analysis of the effects of topological compression, and feature tracking in time-varying fields.

The third part of the thesis deals with comparison of a topological structure called the extremum graph. We provide two comparison measures for extremum graphs based on persistence distortion (PDEG) and Gromov-Wasserstein distance (GWEG). Both persistence distortion and Wasserstein distance are known metrics. We analyze how the underlying metric affects these comparison measures and present various applications such as periodicity detection to facilitate scientific data analysis and visualization.

The final part of the thesis introduces a time-varying version of extremum graphs (TVEG) with a simple comparison criterion to identify correspondences between features in successive time steps. We provide applications to tracking features in time-varying scalar fields from computational fluid dynamics.

Microsoft teams link:

https://teams.microsoft.com/l/meetup-join/19%3ameeting_YmJlMzljYTYtMTZkMS00MTkxLWEyMDgtNmQ3MzI2NTQzYmQz%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%22c747ccaa-ceaa-4197-b4cb-ce2f1d4694da%22%7d

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Series: Ph.D. Colloquium
Title: On symmetries of and equivalence tests for two polynomial families and a circuit class

  • Speaker: Nikhil Gupta,
                   Ph.D (Engg.) student,
                   Dept. of CSA,
  • Faculty Advisor: Prof. Chandan Saha
  • Date and Time: Monday, July 25, 2022, 10:30 AM
  • Venue: CSA Seminar Hall (Room No. 254, First Floor)

Abstract
Two n-variate polynomials f and g in F[x1,...,xn] are said to be equivalent over the field F if there exists an invertible matrix A over F such that f = g(Ax), where x = (x1...xn). The problem of testing whether f is equivalent to a polynomial g coming from a polynomial family G (or computed by a circuit C in a circuit class D) is called the equivalence test (in short, ET) for G (respectively, D). In this thesis, we study equivalence tests for the determinant polynomial family and the class of regular read-once arithmetic formulas (ROFs). We also study some structural and algorithmic properties related to the symmetries of the Nisan-Wigderson design polynomial (in short, NW) and solve an interesting special case of ET for NW.

In the first work, we study ET for the determinant (in short, DET) over finite fields and the field of rational numbers denoted Q. A randomized polynomial time DET over the field of complex numbers was given by Kayal in [Kay12]. But DET over finite fields and over Q were not known. We give the first randomized polynomial-time DET over finite fields and also give the first DET over Q. The DET over Q takes oracle access to an integer factoring algorithm (IntFact) and if the input polynomial f is equivalent to the n x n determinant over Q, then it outputs a certificate matrix A over Q. This algorithm is randomized and is efficient for bounded values of n. Assuming the generalized Riemann hypothesis, we also show that the problem of integer factoring reduces to DET for quadratic forms (i.e., n = 2 case). If the DET algorithm does not take oracle access to IntFact, then it outputs a certificate matrix over an extension field L of Q, where [L:Q]<=n. This variant of DET is also randomized and is efficient for any value of n. The DET algorithms over finite fields and Q are obtained by decomposing the Lie algebra of f and then invoking known algorithms for the full matrix algebra isomorphism (FMAI) problem over finite fields and Q. FMAI is a well-studied problem in computer algebra. We also give a reduction from FMAI to DET, which is efficient when n is bounded. This is joint work with Ankit Garg, Neeraj Kayal, and Chandan Saha.

In the second work, we study ET for read-once arithmetic formulas (ROFs). An ROF is an arithmetic formula where every leaf node is labeled by either a distinct variable or a constant from the underlying field. ROFs are well-studied in the literature. In this work, we give the first randomized polynomial-time ET with oracle access to quadratic form equivalence for certain restricted ROFs, which we call regular ROFs. ET for regular ROFs generalizes the well-known quadratic form equivalence problem over the field of complex numbers and ETs for the classes of sum-product polynomials and ROANFs. ETs for these two classes have been recently studied by Medini & Shpilka (2021). Our ET algorithm uses some crucial properties related to the non-zeroness, the factors, and essential variables of the Hessian determinant of a regular ROF. We study these properties for the Hessian determinant of an arbitrary ROF C by analyzing the structures and coefficients of some nice monomials in the Hessian determinant of C. This is joint work with Chandan Saha and Bhargav Thankey.

In the last work, we study some structural and algorithmic properties related to the symmetries of NW and give a special case of ET for NW. In NW, each pair of monomials has very few variables in common. This property of NW has been exploited to give strong lower bounds for different classes of arithmetic circuits. Like NW, other polynomials like the permanent, the determinant, etc., have also been extensively used in lower bound results. But unlike these polynomials, not much is known about NW. In this work, we study some important properties of NW related to its symmetries. A matrix A is said to be a symmetry of NW if NW(Ax) = NW. We show that NW is characterized by its symmetries over the field of complex numbers but not over the fields of real numbers and rational numbers. Using the symmetries of NW, we show that NW is characterized by circuit identities over any field. This result implies a randomized polynomial time circuit testing algorithm for NW - which tests whether some circuit C computes NW- and the flip theorem for NW. We also solve an interesting special case of ET for NW, which we call the block-diagonal permutation scaling ET for NW. This ET uses the symmetries of NW crucially. This is joint work with Chandan Saha.

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Series: Department Seminar
Title: Moving Fast with High Reliability using Pluggable Types

  • Speaker: Manu Sridharan
  • Date and Time: Wednesday, July 20, 2022, 11:30 AM
  • Venue: CSA Seminar Hall (Room No. 254, First Floor)

Abstract
For many real-world applications, software reliability is of critical importance. At the same time, developers need to be able to move fast in developing new features and products. In this talk, I will describe recent work on using pluggable type systems to reduce the tension between these seemingly-conflicting needs. First, I will present NullAway, a novel nullability type system for Java. NullAway improves on previous work by reducing build-time overhead and requiring fewer annotations through carefully-targeted unsoundness. Then, I will describe more recent work on lightweight and modular typestate analysis targeting accumulation properties, a class of typestate properties that can be checked soundly without heavyweight alias analysis. I will present two instantiations of this approach: the Object Construction Checker, a type system to ensure the safe usage of builders and other complex initialization schemes, and the Resource Leak Checker for practical prevention of resource leaks.

Speaker Bio:
Manu Sridharan is a professor at University of California, Riverside, working in the areas of programming languages and software engineering. He received his PhD from the University of California, Berkeley in 2007, and he previously worked at IBM Research, Samsung Research, and Uber. His research has drawn on, and contributed to, techniques in static analysis, dynamic analysis, and program synthesis, with applications to security, software quality, code refactoring, and software performance. His work has been incorporated into multiple commercial and open-source products, including IBM's commercial security analysis tool and Uber's NullAway tool.

Host Faculty: K. V. Raghavan

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Series: Ph.D. Thesis Defense
Title: Operating System Support for Efficient Virtual Memory

  • Speaker: Ashish Panwar
  • Faculty Advisor: Arkaprava Basu, K. Gopinath
  • Date and Time: Monday, July 18, 2022, 1:30 PM
  • Venue: CSA Seminar Hall (Room No. 254, First Floor)

Abstract
Online talk URL: https://tinyurl.com/46d5f3wx

Virtual memory has proven to be an extremely powerful abstraction for its programmability benefits. Unfortunately, virtual memory is becoming a performance bottleneck due to the address translation wall. Modern applications with large memory footprints necessitate frequent page table walks to perform the virtual to physical address translation. Consequently, the hardware spends 30-50% of the total CPU cycles in servicing TLB misses alone. Virtualization and non-uniform memory access (NUMA) architectures further exacerbate this overhead. For example, virtualized systems involve two-dimensional page table walks that require up to 24 memory accesses for each TLB miss, with current 4-level page tables. The address translation performance drops further on NUMA systems, depending on the distance between the CPU and page tables. These overheads will increase in the future, where deeper page tables and multi-tiered memory systems will enable even larger applications. Virtual memory, therefore, is showing its age in the era of data-centric computing.

This thesis investigates the role of an operating system (OS) and hypervisor in improving the address translation performance. First, we focus on huge pages that can significantly reduce the frequency and cost of TLB misses. Huge pages are widely available in modern systems e.g., x86 architecture supports 2MB and 1GB huge pages, in addition to regular 4KB pages. While huge pages are great in theory, real-world OSs have often delivered disappointing performance while using them. This is because memory management of huge pages is fraught with multiple challenges. We propose several enhancements in OS-level policies and mechanisms to make huge pages beneficial, even under multi-dimensional constraints such as latency, capacity, and fairness.

Second, we investigate the effect of NUMA on address translation performance. NUMA architectures mandate careful data placement to hide the effect of variable memory access latency from applications. Several decades of research on NUMA systems have optimized access to user-level application data. However, prior research has ignored the access performance of kernel data, including page tables, due to their small memory footprint. We argue that it is time to revisit page table management for NUMA-like systems.

The core contributions of this thesis include four systems: Illuminator, HawkEye, Trident, and vMitosis, as summarized below:

Illuminator: We first expose some subtle implications of external memory fragmentation on huge pages. We show that despite proactive measures employed in the memory management subsystem of Linux, unmovable kernel objects (e.g., inodes, page tables, etc.) can deny huge pages to user applications. In a long-running system, unmovable objects fragment physical memory, often permanently, and cause high de-fragmentation overheads. Over time, their effects manifest in performance regressions, OS jitter, and latency spikes. Illuminator effectively clusters kernel objects in a subset of physical memory regions and makes huge page allocations feasible even under heavily fragmented scenarios..

HawkEye: In this work, we deal with OS-based huge page management policies that need to balance complex trade-offs between TLB coverage, memory bloat, latency, and the number of page faults. In addition, we consider performance and fairness issues that appear under fragmentation when memory contiguity is limited. In HawkEye, we propose asynchronous page pre-zeroing to simultaneously optimize for low latency and few page faults. We propose automatic bloat recovery to effectively deal with the trade-offs between TLB coverage and memory bloat at runtime. HawkEye addresses the performance and fairness challenges by allocating huge pages based on their estimated profitability.

Trident: Illuminator and HawkEye try to extract maximum benefits from 2MB huge pages. However, recent findings have shown that even after employing 2MB pages, more than 20% of the total CPU cycles are wasted in handling TLB misses for data center applications. We address this problem using 1GB huge pages that provide up to 1TB per-core TLB coverage on modern systems. Leveraging insights from our earlier work, we propose a multi-level huge page framework called Trident that judiciously allocates 1GB, 2MB, and 4KB pages as deemed suitable at runtime.

vMitosis: In this work, we focus on the effect of NUMA on address translation in virtualized servers. We show that page table walks often involve remote memory accesses on NUMA systems that can slow down large memory applications by more than 3x. Interestingly, the slow down observed due to remote page table accesses can even outweigh that of accessing remote data, even though page tables consume less than 1% memory of overall application footprint. vMitosis mitigates the effect of NUMA on page table walks by enabling each core to handle TLB misses from its local socket. We achieve this by judiciously migrating and replicating page tables across NUMA sockets.

Overall, with this thesis, we show that adequate OS and hypervisor support can help virtual memory thrive even in the era of data-centric computing. We have implemented our proposed systems in the Linux OS kernel and KVM hypervisor. Our optimizations are transparent to the users, and using them does not require any hardware or application modifications.

Speaker Bio:
Ashish Panwar is a Ph.D. candidate at the Indian Institute of Science, Bangalore. His research interest lies in optimizing memory management of computer systems -- particularly in a way that avoids hardware and application modifications. His research thus mainly revolves around operating systems, hypervisors, and middleware. Ashish has published several articles in revered publication venues, including four in ASPLOS, one in MICRO, and PACT each, so far. While his published research revolves around CPU memory management, in recent times, he has been interested in that of GPUs for machine learning applications.

Host Faculty: Arkaprava Basu

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Series: IISc - MSR Seminar Series
Title: Scheduling to minimize the Age of Information

  • Speaker: Prof Rahul Vaze
                   Associate Professor
                   School of Technology and Computer Science
                   Tata Institute of Fundamental Research
  • Date and Time: Friday, July 15, 2022, 4:00 PM
  • Venue: CSA Seminar Hall (Room No. 254, First Floor)

Abstract
Traditional metrics of interest in scheduling literature are flow-time, completion-time, makespan etc. For modern applications e.g. IoT, smart cars, gaming, etc. information timeliness is essential and one measure that captures it well is the Age of Information, which counts how stale the information is. In this talk, we will consider the online scheduling problem of minimizing the Age of Information for the most general system model and discuss some initial progress in terms of deriving online algorithms with constant competitive ratios.

For more details about the seminar please visit the website at https://www.csa.iisc.ac.in/iisc-msr-seminar/

Microsoft team link:

https://teams.microsoft.com/l/meetup-join/19%3ameeting_ZGE3NDg5NzktMWQ0Zi00MzFmLTg5OTgtMTMyYWM4MWQyYjI2%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%227c84465e-c38b-4d7a-9a9d-ff0dfa3638b3%22%7d

Host Faculty: Rameesh Paul and Rahul Madhavan

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Series: Theory Seminar
Title: Online Algorithm for the Minimum Metric Bipartite Matching Problem

  • Speaker: Prof. Sharath Raghvendra,
                   Associate Professor,
                   Virginia Tech
  • Date and Time: Friday, July 01, 2022, 11:00 AM
  • Venue: CSA Seminar Hall (Room No. 254, First Floor)

Abstract
In the online minimum-metric bipartite matching (OMBM) problem, we are given a set S of server locations. The locations of requests (given by the set R) are revealed one at a time and when a request is revealed, we must immediately and irrevocably match it to a free" server. The cost of matching a server to request is given by the distance between the two locations (which we assume satisfies triangle inequality). The objective of this problem is to come up with a matching of servers to requests which is competitive with respect to the minimum-cost matching of S and R. In this talk, I will present an online algorithm (called the (Robust-Matching) RM-Algorithm) for this problem and show that it gives near optimal performance in the adversarial and random arrival models and for special metrics such as the line metric. The analysis for all of these cases is based on the dynamics of a primal-dual method used within the RM-algorithm. I will conclude the talk by discussing some open questions pertaining to the OMBM and the closely related k-server problems. Part of this talk is based on joint work with students Krati Nayyar and Rachita Sowle. Results presented here appear in APPROX 2016, FOCS 2017, SoCG 2018 and SWAT 2022.

For more details about the seminar please visit the website at https://www.csa.iisc.ac.in/iisc-msr-seminar/

Microsoft Teams Link:

https://teams.microsoft.com/l/meetup-join/19%3ameeting_ZGE3NDg5NzktMWQ0Zi00MzFmLTg5OTgtMTMyYWM4MWQyYjI2%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%227c84465e-c38b-4d7a-9a9d-ff0dfa3638b3%22%7d

Host Faculty: Rahul Madhavan, and Rameesh Paul

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Series: Ph.D. (Engg.) Colloquium- ONLINE
Title: Inducing constraints in paraphrase generation and consistency in paraphrase detection

  • Speaker: Ashutosh Kumar,
                   Ph.D (Engg.) student
                   Dept. of C.S.A
                   I.I.Sc.
  • Faculty Advisor: Prof. Partha Pratim Talukdar
  • Date and Time: Wednesday, June 29, 2022, 9:00 AM
  • Venue: Microsoft Teams - ON-LINE

Abstract
Deep learning models typically require a large volume of data. Manual curation of datasets is time-consuming and limited by imagination. As a result, natural language generation (NLG) has been employed to automate the process. However, NLG models are prone to producing degenerate, uninteresting, and often hallucinated outputs [1]. Constrained generation aims to overcome these shortcomings by appending additional information to the generation process. Training data thus generated can help improve the robustness of deep learning models. Therefore, the key research question of the thesis is:

“How can we constrain generation models, especially in NLP, to produce meaningful outputs and utilize them for building better classification models?”

In the first part, we present two approaches for constraining NLG models via the task of paraphrase generation.

Paraphrase generation involves the generation of text that conveys the same meaning as a reference text. Our proposal is the following two strategies:

DiPS (Diversity in Paraphrases using Submodularity): The first approach deals with constraining paraphrase generation to ensure diversity, i.e., ensuring that generated text(s) are sufficiently lexically different from each other without compromising on relevance (fidelity). We propose a decoding algorithm for obtaining such diverse texts. We provide a novel formulation of the problem in terms of monotone submodular function maximization, specifically targeted toward the task of paraphrase generation. We demonstrate the effectiveness of our method for data augmentation on multiple tasks such as intent classification and paraphrase recognition.

SGCP (Syntax Guided Controlled Paraphraser): The second approach deals with constraining paraphrase generation to ensure syntacticality, i.e., ensuring that the generated text is syntactically coherent with an exemplar sentence. We propose Syntax Guided Controlled Paraphraser (SGCP), an end-to-end framework for syntactic paraphrase generation without compromising relevance (fidelity). The framework uses a sequence-to-sequence model with a Tree-LSTM-based gating mechanism to selectively choose syntactic representations during text generation. This approach performs significantly better than prior works that utilize only limited syntactic information in the exemplar.

The second part of the research question pertains to ensuring that the generated output is meaningful. ​​Towards this, we present an approach for paraphrase detection to ascertain that the generated output is semantically coherent with the reference text. Paraphrase Detection is the task of detecting whether or not the two input natural language statements are paraphrases of each other. Fine-tuning pre-trained models such as BERT and RoBERTa on paraphrase datasets have become the go-to approaches for such tasks. However, tasks like paraphrase detection are symmetric - they require the output to be invariant of the order of the inputs. In fine-tuned models for classification, inconsistency is often observed in the predicted labels or confidence scores. We validate this shortcoming and apply a consistency loss function to alleviate inconsistency in symmetric classification. Our results show an improved consistency in predictions for three paraphrase detection datasets without a significant drop in the accuracy scores.

While this work addresses the research question via paraphrase generation and detection, the approaches presented here apply broadly to NLP-based deep learning models that require imposing constraints and ensuring consistency. The work on paraphrase generation can be extended to impose new kinds of constraints on generation (for example, sentiment coherence), and the work on paraphrase detection can be applied to ensure consistency in other symmetric classification tasks that use deep learning models (for example, sarcasm interpretation).

References:

[1] Ehud Reiter. Hallucination in neural nlg. https://ehudreiter.com/2018/11/12/hallucination-in-neural-nlg/, 2018.

Microsoft teams link:

https://teams.microsoft.com/l/meetup-join/19%3ameeting_ZGM0NjE1ZTYtNWJhMi00ZjhmLTkxOTMtNjBhMmY1ZDYxMGI3%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%2258c2a810-9762-463d-90d0-20832b3d1592%22%7d

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Series: M.Tech (Research) Colloquium- ON-LINE
Title: Improved Algorithms for Variants of Bin Packing and Knapsack.

  • Speaker: KVN Sreenivas,
                   M.Tech (Research) student
                   Dept. of C.S.A
                   I.I.Sc.
  • Faculty Advisor: Dr. Arindam Khan
  • Date and Time: Tuesday, June 28, 2022, 3:00 PM
  • Venue: Microsoft Teams - ON-LINE

Abstract
We study variants of two classical optimization problems: Bin Packing and Knapsack. Both bin packing and knapsack fall under the regime of "Packing and Covering Problems". In bin packing, we are given a set of input items, each with an associated size, and the objective is to pack these into the minimum number of unit capacity bins. On the other hand, in the knapsack problem, each item has an additional profit associated with it. The objective is to find a maximum profitable subset that can be packed into a unit capacity knapsack. Both bin packing and knapsack find numerous applications; however, both turn out to be NP-Hard. Hence, it is natural to seek approximation algorithms for these problems. Lawler settled the knapsack problem by giving an FPTAS, whereas the progressive works of de la Vega and Lueker, Karmarkar and Karp, and Rothvoss have more-or-less settled the bin packing problem. However, many variants of these problems (e.g., multidimensional, geometric, stochastic) also find wide applicability, but havent been settled. We make progress on this front by providing new and improved algorithms for several such variants.

First, we study bin packing under the i.i.d. model, where item sizes are sampled independently and identically from a distribution in (0,1]. Both the distribution and the total number of items are unknown. The items arrive one by one, and their sizes are revealed upon their arrival, and they must be packed immediately and irrevocably in bins of unit size. We provide a simple meta-algorithm that takes an offline alpha-asymptotic approximation algorithm and provides a polynomial-time (alpha+epsilon)-competitive algorithm for online bin packing under the i.i.d. model, where epsilon>0 is a small constant. Using the AFPTAS for offline bin packing, we thus provide a linear time (1+epsilon)-competitive algorithm for online bin packing under the i.i.d. model, thus settling the problem.

Then we study a well-known geometric generalization of the knapsack problem, the 3D Knapsack problem. In this problem, the items are cuboids in three dimensions, and the knapsack is a unit cube. The objective is to pack a maximum profitable subset of the input set in a non-overlapping, axis-parallel manner inside the knapsack. Depending on whether rotations around axes (by ninety degrees) are allowed or not, we obtain two variants. [DHJTT 07] gave a (7+epsilon) (resp. (5+epsilon)) approximation algorithm for the 3D Knapsack problem without rotations (resp. with rotations). Despite the importance of the problem, there has been no improvement in the ratios for fifteen years. First, we give alternate algorithms that achieve the same approximation ratios (7+epsilon, 5+epsilon). These algorithms and their analyses are far simpler. Then, for the case when rotations are allowed, we give an improved (31/7+epsilon) approximation algorithm in the general setting, and a 2.78 approximation algorithm in the important special case where each item has a profit equal to its volume.

We also introduce and study a generalization of the knapsack problem with geometric and vector constraints. The input is a set of rectangular items, each with an associated profit and d nonnegative weights (dD vector), and a square knapsack. The goal is to find a non-overlapping, axis-parallel packing of a subset of items into the given knapsack such that the vector constraints are not violated, i.e., the sum of weights of all the packed items in any of the d dimensions does not exceed one. Two variants are defined: rotations allowed by 90 degrees and rotations not allowed. We give (2+epsilon)-approximation algorithms for both variants.

Finally, we consider the problem of packing dD hypercubes into a knapsack defined by the region [0,1]^d. Each hypercube has an associated profit, and the goal is to find a maximum profitable non-overlapping, axis-parallel packing. We consider two special cases of this problem: (i) cardinality case, where each item has unit profit, (ii) bounded profit-volume ratio case, where the profit-to-volume ratio of each item lies in the range [1,r] for some fixed constant r. We give near-optimal algorithms for both cases.

Microsoft teams link: https://teams.microsoft.com/l/meetup-join/19%3ameeting_ZmVjYTEwZWQtN2RlMy00ZDVmLWJiZTItOGU0MDc3NTRlMjk0%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%2238682e77-d26b-4d00-8761-a89f372adc36%22%7d

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Series: M.Tech (Research)Thesis Defence -ONLINE
Title: Explainable and Efficient Neural models for Natural Language to Bash Command Translation

  • Speaker: Mr. Shikhar Bharadwaj,
                   M.Tech (Research) student,
                   Dept. of CSA
  • Faculty Advisor: Prof. Shirish K Shevade
  • Date and Time: Wednesday, June 22, 2022, 2:00 PM
  • Venue: Microsoft Teams - ON-LINE

Abstract
One of the key goals of Natural Language Processing is to make computers understand natural language. Semantic Parsing has been one of the driving tasks for Natural Language Understanding. It is formally defined as the task of generating meaning representation from natural language input. In this work, we focus on using the Bash command as the meaning representation. Bash is a Unix command language used for interacting with the Operating System. Recent works on natural language to Bash command translation have made significant advances on this problem. The best performing solutions employ a neural network architecture called the Transformer. In this work, we explore the aspects of explainability and efficiency for this task and use the Transformer as one of the baselines for comparing the proposed approaches. In the first part, we utilize documentation data from Linux manual pages and the Abstract Syntax Tree for Bash to generate explanations for the translated Bash command. We propose a novel architecture that incorporates tree structure information in the Transformer and provides explanations for its predictions via alignment matrices between user invocation and manual page text. We find that the proposed method performs on par with the Transformer performance. Our method performs better than fine-tuned T5, a Transformer-based neural model pre-trained on a large amount of text data in a self-supervised manner.

In the second part, we use the problems inherent synchronous structure and propose the Segmented Invocation Transformer (SIT) that utilizes the information from the constituency parse tree of the natural language invocation. Our method is motivated by the alignment between segments in the natural language text and Bash command components. By utilizing this structure, the proposed method outperforms the state-of-the-art approach while achieving a 1.8x improvement in the inference time (as measured on a CPU) and a 5x reduction in model parameters. We also conduct an attribution analysis using Integrated Gradients to empirically confirm the identified structure and the ability of SIT to capture it.

Microsoft teams link: https://teams.microsoft.com/l/meetup-join/19%3ameeting_MjZhOWViYzMtZmQ5MC00NzMwLWI3MjktODlhOGU4YjkxZGYz%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%229c3e2bfe-1b0f-4d7b-a589-832878069dc6%22%7d

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Series: Ph.D Research Thesis Colloquium
Title: HYDRA: A Dynamic Approach to Database Regeneration

  • Speaker: Anupam Sanghi,
                   Ph.D (Engg) student
                   Dept of Computer Science and Automation
  • Faculty Advisor: Prof. Jayant R. Haritsa
  • Date and Time: Tuesday, June 21, 2022, 10:00 AM
  • Venue: CSA Seminar Hall (Room No. 254, First Floor)

Abstract
Database software vendors often need to generate synthetic databases for a variety of applications, including (a) Testing database engines and applications, (b) Data masking, (c) Benchmarking, (d) Creating what-if scenarios, and (e) Assessing performance impacts of planned engine upgrades. The synthetic databases are targeted toward capturing the desired schematic properties (e.g.~keys, referential constraints, functional dependencies, domain constraints), as well as the statistical data profiles (e.g., value distributions, column correlations, data skew, output volumes) hosted on these schemas.

Several data generation frameworks have been proposed in the last two decades. It started from the ab-initio generation tools that use standard mathematical distributions and do not depend on the client databases or query workloads. Subsequently, tools that generate data using column distributions became prominent. However, none of these mechanisms could mimic the customer query-processing environments satisfactorily. The more contemporary school of thought is generating workload-aware data that uses query execution plans from the customer workloads as input and guarantees volumetric similarity. That is, the intermediate row-cardinalities obtained at the client and vendor sites are very similar when matching query plans are executed. This similarity helps to preserve the multi-dimensional layout and flow of the data, a prerequisite for achieving similar performance on the client’s workload. However, even in this category, the existing frameworks are crippled by one or more of the following limitations: (a) inability to provide a comprehensive algorithm to handle the queries based on core relational algebra operators, namely, select, project, and join; (b) inability to scale to big data volumes; (c) inability to scale to large input workloads; and (d) poor accuracy on unseen queries.

In this work, motivated by the above lacuna, we present HYDRA, a data regeneration tool that materially addresses the above challenges by adding functionality, dynamism, scale, and robustness. Firstly, the extended workload coverage is obtained by providing a comprehensive solution to support queries based on select-project-join relational algebra operators. Specifically, the constraints are modeled using a linear feasibility problem, in which each variable represents the volume of a region of the data space. These regions are computed using a scheme of partitioning strategies. For example, to encode the filter constraints, our region-partitioning approach divides the data space into the provably minimum number of regions, thereby reducing the existing solution's complexity by many orders of magnitude. Our projection subspace division and projection isolation strategies address the critical challenges in incorporating projection-inclusive constraints. By modeling referential constraints over denormalized equivalents of the tables, Hydra delivers a comprehensive solution that also additionally handles join constraints.

Secondly, a unique feature of our data regeneration approach is that it delivers a database summary as the output rather than the static data itself. This summary is of negligible size and depends only on the query workload and not on the database scale. It can be used for dynamically generating data during query execution. Therefore, the enormous time and space overheads incurred by prior techniques in generating and storing the data before initiating analysis are eliminated. Specifically, the summaries for complex Big Data client scenarios comprising over a hundred queries are constructed within just a few minutes, requiring only a few 100 KBs of storage. We have evaluated the proposed ideas using both synthetic benchmarks such as TPC-DS and real-world benchmarks based on Census and IMDB databases.

Thirdly, to improve accuracy towards unseen queries, Hydra additionally exploits metadata statistics maintained by the database engine. Specifically, it adds an objective function to the linear program to pick a solution with improved inter-region tuple distribution. Further, a uniform distribution of tuples within regions is generated to get a spread of values. In a nutshell, these techniques facilitate careful selection of a desirable database from the candidate synthetic databases and also provide metadata compliance.

Lastly, as a proof of concept, the Hydra framework has been prototyped in a Java based-tool that provides a visual and interactive demonstration of the data regeneration pipeline. The tool has been warmly received by both academic and industrial communities.

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Series: IISc ACM student chapter invited talk
Title: Why should we learn logic, and why should we learn logic?

  • Speaker: Prof. R Ramanujam,
                   Professor,
                   Institute of Mathematical Sciences
                   Chennai
  • Date and Time: Friday, June 17, 2022, 3:00 PM
  • Venue: CSA Seminar Hall (Room No. 254, First Floor)

Abstract
Computer science curricula do not usually advertise the fact that computers, programming and models of computation all arose from trying to answer fundamental questions in logic. But is it only a matter of historical pride? Could learning logic actually be useful for those who actually do things (and not just theorize)? Even if that is true, should it not be sufficient for a few to write formulas and such, while most of us build "apps"? These are reasonable questions for a computer science student to ask, and the talk is an attempt to engage in a discussion with her.

Host Faculty: Prof. R Govindarajan In association with IISc ACM student chapter.

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Series: Theory Seminar
Title: Hypergraph expansion, CSPs, and algorithmic decoding of epsilon-balanced codes

  • Speaker: Prof. Madhur Tulsiani,
                   Associate Professor, Toyota Technological Institute at Chicago,
                   Associate Professor (part time), Department of Computer Science, University of Chicago
  • Date and Time: Thursday, June 16, 2022, 9:00 PM
  • Venue: Microsoft Teams - ON-LINE

Abstract
We will discuss some new notions of hypergraph expansion, which can be exploited by spectral algorithms, as well as ones based on semidefinite programming hierarchies. These properties lead to new structural characterizations and algorithmic regularity lemmas for hypergraphs, as well as new decoding algorithms for codes based on bias-reduction via direct-sum, such as the breakthrough construction of epsilon-balanced codes by Ta-Shma. (Based on joint work with Vedat Levi Alev, Fernando Granha Jeronimo, Dylan Quintana, and Shashank Srivastava)

For more details about the seminar please visit the website at https://www.csa.iisc.ac.in/iisc-msr-seminar/

Microsoft Teams Link:

https://teams.microsoft.com/l/meetup-join/19%3ameeting_ZGE3NDg5NzktMWQ0Zi00MzFmLTg5OTgtMTMyYWM4MWQyYjI2%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%227c84465e-c38b-4d7a-9a9d-ff0dfa3638b3%22%7d

Host Faculty: Sruthi Gorantla, Rahul Madhavan, and Rameesh Paul

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Series: Department Seminar
Title: Leveraging AI & HPC to Enable Semiconductor Manufacturing in the Angstrom-era

  • Speaker: Prof. Pradeep Ramachandran
                   Director and Head of Research at KLAs Artificial Intelligence
                   and Advanced Computing Lab (AI-ACL)
  • Date and Time: Tuesday, June 14, 2022, 4:00 PM
  • Venue: CSA Seminar Hall (Room No. 254, First Floor)

Abstract
Semiconductor manufacturing is approaching the Angstrom-era with innovations such as gate all around transistors, and chip to chip integration technologies enabling the continuation of Moores law. This talk will highlight some of the challenges that these advanced technologies pose to manufacturing semiconductors, and will cover how modern AI & HPC technologies are being leveraged to address these challenges to enable high-volume manufacturing. We will also give a peek into some of the solutions that KLA is pioneering in this space.

Speaker Bio:
Pradeep Ramachandran is the Director and Head of Research at KLAs Artificial Intelligence and Advanced Computing Lab (AI-ACL) based out of IIT Madras Research Park. AI-ACL focuses on doing advanced R&D in AI & HPC technologies to enable KLA to maintain its leadership in process control tools for semiconductor manufacturing. AI-ACL is located in the IIT Madras Research Park in Chennai, India. Pradeep holds a B-Tech from IIT Madras, and an MS and PhD from the University of Illinois at Urbana Champaign. Prior to joining KLA in 2021, Pradeep worked as an Architect in the memory controller performance simulation and modeling team at Intel, and as Principal Engineer at MulticoreWare Inc, and Uhnder Inc. Pradeeps research interests lies at the intersection of hardware and software and has developed several system-level solutions that leverage the synergies at the boundary.

Host Faculty: Prof. Uday Kumar Reddy .B

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