Class Schedule
Here is a tentative schedule for the semester.
Reviews: You will be reviewing at least five research papers during the course. The format for submitting reviews will be sent out after the class starts.
- Date
- Topic
- Review
- Notes
- Aug-6
- Introduction
- Slides
- Aug-8
- Instruction set architecture
- P1-ISA Power struggles
- Slides
- Aug-13
- Pipeline
- Slides
- Aug-20
- Branch prediction
- P2-why_branch_prediction_works
- Slides
- Aug-27
- Superscalar/VLIW
- Slides
- Aug-29
- Out-of-order execution
- Sep-03
- Out-of-order execution
- P3-Discerning OOO performance benefits
- Slides
- Sep-05
- R10K and memory disambiguation
- P4-MIPS-R10K
- Slides
- Sep-10
- Caches and Prefetching
- Slides
- Sep-12
- Virtual memory
- Slides
- Sep-17
- Virtual Memory
- -
- Slides
- Sep-19
- Midsem exam
- -
- Sep-26
- Main memory
- Slides
- Oct-1
- Main memory
- P5-Tiered-latency-DRAM
- Slides
- Oct-3
- Virtual memory contd.
- P6-translation-triggerd-prefetching
- Slides
- Oct-10
- Multi-threading
- P7-SMT-icount
- Slides
- Oct-15
- Multi-cores and cache coherence
- Slides
- Oct-17
- Cache coherence contd.
- P8-coherence-here-to-stay
- Slides
- Oct-22-24
- No class -- Instructor in Japan
- Slides
- Oct-29
- Memory consistency and synhronization
- P9-addr_translation_mem_consistency
- Slides
- Oct-31
- Instuctor in US.
- Nov-5
- AMD guest lecture.
- Slides
- Nov-12
- Data Level parallelism (SIMD)
- Slides
- Nov-14
- DLP
- -
- Nov-19
- No class
- -
- Nov-22
- GPUs
- P10_CCSWS.pdf
- Slides
- Nov 30
- Final exam
- Dec-7
- Project presentataion
- -
- -