Publications     (Journals   |   Conferences)

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My recent publications predominantly appear in refereed International Conferences , which follow a rigorous review process, often involving 4 or 5 reviews per paper, and with a low acceptance rate (typically 20% -- 30%). These conference publications also have a high citation index.

This material is presented to ensure timely dissemination of scholarly and technical work on a non-commercial basis. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. These works may not be reposted without the explicit permission of the copyright holder.

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Conference Publications

1. IPDPS-2015      pdf
   Jayvant Anantpur and R. Govindarajan, "PRO: Progress Aware GPU Warp Scheduling Algorithm", in IEEE International Parallel and Distributed Processing Symposium, IPDPS 2015, Hyderabad, India, May 25--29, 2015
   
2. CGO-2015      pdf
   Vaivaswatha Nagaraj and R. Govindarajan, "Approximating flow-sensitive pointer analysis using frequent itemset mining", in Proceedings of the 13th Annual IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2015, San Francisco, CA, USA, February 07--11, 2015 (Best Paper Award)
3. ICPE-2015      pdf
   Nagendra Gulur, Mahesh Mehendale, and R. Govindarajan, "A Comprehensive Analytical Performance Model of DRAM Caches", in Proceedings of the 6th ACM/SPEC International Conference on Performance Engineering, ICPE2015, Austin, TX, USA, February 01--04, 2015
4. HiPEAC-2015      pdf
   Martin R. Kong, Antoniu Pop, Louis-Noel Pouchet, R. Govindarajan, Albert Cohen, Saday Sadayappan, "Compiler/Runtime Framework for Dynamic Dataflow Parallelization of Tiled Programs", in Proc. of the 10th International Conference on High Performance and Embedded Architectures and Compilers,(HiPEAC-2015), Amsterdam, Jan. 2015.
5. Micro-2014      pdf
   Nagendra Dwarakanath Gulur, Mahesh Mehendale, R. Manikantan, and R. Govindarajan, "Bi-Modal DRAM Cache: Improving Hit Rate, Hit Latency and Bandwidth" in 47th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2014, Cambridge, United Kingdom, December 13--17, 2014
6. SIGMETRICS-2014      pdf
   Nagendra Dwarakanath Gulur, Mahesh Mehendale, R. Manikantan, and R. Govindarajan, "ANATOMY: an analytical model of memory system performance", in The 2014 ACM international conference on Measurement and modeling of computer systems, Austin, TX, USA, June 16--20, 2014
7. CC-2014      pdf
   Jayvant Anantpur and R. Govindarajan, "Taming Control Divergence in GPUs through Control Flow Linearization", in Compiler Construction - 23rd International Conference, CC 2014, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2014, Grenoble, France, April 5--13, 2014
8. CGO-2014      pdf
   Prasanna Pandit and R. Govindarajan, "Fluidic Kernels: Cooperative Execution of OpenCL Programs on Multiple Heterogeneous Devices", in 12th Annual IEEE/ACM International Symposium on Code Generation and Optimization, CGO 14, Orlando, FL, USA, February 15--19, 2014
9. PACT-2013      pdf
   Vaivaswatha Nagaraj and R. Govindarajan, "Parallel flow-sensitive pointer analysis by graph-rewriting", in Proceedings of the 22nd international conference on Parallel architectures and compilation techniques, Edinburgh, Scotland, September 7--11, 2013
10. ASPLOS-2013      pdf
    Sreepathi Pai, Matthew J. Thazhuthaveetil, and R. Govindarajan, "Improving GPGPU Concurrency with Elastic Kernels", in Proceedings of the 18th International Conference on Architectural Support for Programming Languages and Operating Systems, Houston, USA, March 16--20, 2013
11. CGO-2013      pdf
    Jayvant Anantpur and R. Govindarajan, "Runtime Dependence Computation and Execution of Loops on Heterogeneous Systems", in Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization, 2013, Shenzhen, China, February 23--27, 2013
12. PACT-2012      pdf
    Sreepathi Pai, R. Govindarajan, and Matthew J. Thazhuthaveetil, "Fast and Efficient Automatic Memory Management for GPUs using Compiler-Assisted Runtime Coherence Scheme", in Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques, Minneapolis, USA, September 19--23, 2012
13. EUROPAR-2012      pdf
    Raghu Prabhakar, R. Govindarajan, and Matthew J. Thazhuthaveeti, "CUDA-For-Clusters : A System for Efficient Execution of CUDA Kernels on Multi-Core Clusters", in Euro-Par 2012 Parallel Processing, Rhodes Island, Greece, August 27--31, 2012
14. ICS-2012      pdf
    Nagendra Dwarakanath Gulur, Mahesh Mehendale, R. Manikantan, and R. Govindarajan, "Multiple Sub-Row Buffers in DRAM: Unlocking Performance and Energy Improvement Opportunities", in International conference on Supercomputing 2012, Venice, Italy, June 25--29 2012
15. ISCA-2012      pdf
    R. Manikantan, Kaushik Rajan, and R. Govindarajan, "Probabilistic Shared Cache Management (PriSM)", in Proceedings of the 39th Annual International Symposium on Computer Architecture, Portland, OR, USA, June 9--13, 2012
16. CGO-2012      pdf
    Sandya Mannarswamy and R. Govindarajan, "Reconciling Transactional Conflicts with Compilers Help", in Proceedings of the Tenth International Symposium on Code Generation and Optimization 2012, San Jose, CA, USA, April 01--04, 2012
17. PACT-11      pdf     
    Sandya Mannarswamy and R. Govindarajan, "Making STMs Cache Friendly with Compiler Transformations", in Proc. of the 20th International Parallel Architectures and Compilation Techniques (PACT 2011), Galveston Island, TX, Oct. 2011.
18. PLDI-11      pdf     
    Ashwin Prasad, Jayvant Anantpur, and R. Govindarajan, "Automatic Compilation of MATLAB Programs for Synergistic Execution on Heterogeneous Processors", in Proc. of the 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation(PLDI-2011), San Jose, California, June 4--8, 2011.
19. IPDPS-11      pdf     
    Sandya Mannarswamy and R. Govindarajan, "Variable Granularity Access Tracking Scheme for Improving the Performance of Software Transactional Memory", in Proc. of the 25th IEEE International Parallel & Distributed Processing Symposium (IPDPS-2011), Anchorage, Alaska, USA, May 16--20, 2011.
20. CGO-11      pdf     
    Rupesh Nasre and R. Govindarajan, "Prioritizing Constraint Evaluation for Efficient Points-to Analysis", in Proc. of the IEEE/ACM International Symposium on Code Generation Optimization (CGO-2011), Chamonix, France, April 02--06, 2011.
21. HPCA-11      pdf     
    R. Manikantan, Kaushik Rajan, and R. Govindarajan, "NUcache: An Efficient Multicore Cache Organization Based on Next-Use Distance", in Proc. of the 17th International Conference on High Performance Computer Architecture (HPCA-2011), San Antonio, Texas, February 12--16, 2011.
22. HiPEAC-11      pdf     
    R. Manikantan, R. Govindarajan, and Kaushik Rajan, "Extended Histories - Improving Regularity and Performance in Correlation Prefetchers", in Proc. of the 6th International Conference on High Performance and Embedded Architectures and Compilers,(HiPEAC-2011), Heraklion, Crete, Greece, January 22--26, 2011.
23. ICPP-10      pdf     
    Sandya Mannaraswamy and R. Govindarajan, "Handling Conflicts with Compiler's help in Software Transactional Memory Systems", in Proc. of the 39th International Conference on Parallel Processing (ICPP-2010), San Diego, CA, September 13--16, 2010.
24. SAS-10      pdf     
    Rupesh Nasre and R. Govindarajan, "Points-to Analysis as a System of Linear Equations", in Proc. of the 17th International Static Analysis Symposium(SAS-2010), Perpignan, France, September 14--16, 2010.
25. LCAS-GPU-10      pdf     
    Sreepathi Pai, R. Govindarajan, and M. J. Thazhuthaveetil, "PLASMA: Portable Programming for SIMD Heterogeneous Accelerators", in Proc. of the Workshop on Language, Compiler, and Architecture Support for GPGPU, (held in conjunction with HPCA/PPoPP 2010) Bangalore, India, January 9, 2010.
26. PACT-09      pdf     
    Sandya Mannarswamy, R. Govindarajan and Rishi Surendran, "Region Based Structure Layout Optimization by Selective Data Copying", in Proc. of the 18th International Conference on Parallel Architectures and Compilation Techniques (PACT-2009), Raleigh, USA, Aug. 2009.
27. ICCCN-09      pdf     
    B.C. Girish and R. Govindarajan, "Reducing Buffer Requirements in Core Routers using Dynamic Buffering", in Proc. of the 18th International Conference on Computer Communications and Networks (ICCCN 2009), San Francisco, USA, Sept. 2009.
28. LCTES-09      pdf     
    A. Udupa, R. Govindarajan, and M. J. Thazhuthaveetil, "Synergistic Execution of Stream Programs on Multicores with Accelerators" in Proc. of the ACM SIGPLAN/SIGBED 2009 Conference on Languages, Compilers and Tools for Embedded Systems (LCTES 2009), Dublin Ireland, June 2009.
29. CGO-09      pdf     
    A. Udupa, R. Govindarajan, and M. J. Thazhuthaveetil, "Software Pipelined Execution of Stream Programs on GPUs" in Proc. of the International Symposium on Code Generation and Optimization (CGO-09), Seattle, WA, USA, Mar. 2009.
30. HiPC-08      pdf     
    B.C. Girish and R. Govindarajan, "Improving Performance of Result Caches in Network Processors" in Proc. of the 15th Annual International Conference on High Performance Computing (HiPC-08), Bangalore, Dec. 2008.
31. SoCC-08      pdf     
    Sudhakar Surendran, Rubin Parekhji, and R. Govindarajan, "A Systematic Approach to Synthesis of Verification Test-suites for Modular SoC Designs", in Proc. of the 21st Annual IEEE SoC Conference, (SoCC-08), Newport Beach, CA, USA, Sept. 2008.
32. InterSpeech-08      pdf     
    Mrugesh R. Gajjar, R. Govindarajan, and T.V. Sreenivas, "Online Unsupervised Pattern Discovery in Speech using Parallelization", in Proc. of the InterSpeech 2008, Brisbane, Sept. 2008.
33. ICS-08      pdf     
    R. Manikantan and R. Govindarajan, "Focused Prefetching: Performance Oriented Prefetching Based on Commit Stalls", in Proc. of the Intl. Conf. on Supercomputing (ICS-08), Kos, Greece, June 2008.
34. CGO-08      pdf     
    Aditya Thakur and R. Govindarajan, "Comprehensive Path-Sensitive Dataflow Analysis" in Proc. of the International Symposium on Code Generation and Optimization (CGO-08), Boston, MA, USA, Apr. 2008.
35. VLSI-08      pdf     
    T.S. Rajesh Kumar, C.P. Ravikumar, and R. Govindarajan, "Memory Architecture Exploration Framework for Cache Based Embedded SoC" in Proc. of the International Conference on VLSI Design (VLSI-08) Hyderabad, India, Jan. 2008.
36. HiPC-07      pdf     
    K. Shyam and R. Govindarajan, "Compiler-Directed Dynamic Voltage Scaling using Program Phases" in Proc. of the 14th Annual International Conference on High Performance Computing (HiPC-07) Goa, India, Dec. 2007.
37. Micro-07      pdf     
    Kaushik Rajan and R. Govindarajan, "Emulating Optimal Replacement with a Shepherd Cache" in Proc. of the International Symposium on Microarchitecture (MICRO-40), Chicago, IL, USA, Dec. 2007.
38. QEST-07      pdf     
    Girish B.C. and R. Govindarajan, "A Petri Net Model for Evaluating Packet Buffering Strategies in a Network Processor" in Proc. of the 4th International Conference on the Quantitative Evaluation of SysTems (QEST-07), Edinburgh, Scotland, Sept. 2007.
39. IPDPS-07      pdf     
    S. Govind, R. Govindarajan, and J. Kuri "Packet Reordering in Network Processors" in Proc. of the International Parallel and Distributed Processing Symposium (IPDPS-07) Long Beach, CA, USA, 2007.
40. CC-07      pdf     
    K. Shyam and R. Govindarajan, "Compiler Directed Power Optimization for Partitioned Memory Architectures", in Proc. of the Compiler Construction Conference (CC-07) Braga, Portugal, 2007.
41. CC-07      pdf     
    Santosh G. Nagarakatte and R. Govindarajan, "Register Allocation and Optimal Spill code Scheduling in Software Pipelined Loops using 0-1 Integer Linear Programming Formulation", in Proc. of the Compiler Construction Conference (CC-07) Braga, Portugal, 2007.
42. ASPDAC-07      pdf     
    T.S. Rajesh Kumar, C.P. Ravi Kumar, and R. Govindarajan, "MODLEX: A Multi-Objective Data Layout Exploration Framework for Embedded SoC'', in Proc. of the 12th Asia and South Pacific Design Automation Conference (ASP-DAC-07), Yokohama, Japan, 2007
43. VLSI-07      pdf     
    T.S. Rajesh Kumar, C.P. Ravi Kumar, and R. Govindarajan, "MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip", in Proc. of the International Conference on VLSI Design (VLSI-07), Bangalore, 2007.
44. PACT-06      pdf     
    Kaushik Rajan and R. Govindarajan, "Two-level Mapping Based Cache Index Selection for Packet Forwarding Engines", in Proc. of the 15th Intl. Conf. on Parallel Architectures and Compilation Techniques (PACT-06), Seattle, WA, USA, Sept. 2006.
45. ICS-06      pdf     
    Rajesh Vivekanandham, Bharadwaj Amrutur, and R Govindarajan, "A Scalable Low Power Issue Queue for Large Instruction Window Processors", in Proc. of the Intl. Conf. on Supercomputing (ICS-06), Cairns, Australia, June 2006.
46. IPDPS-06      pdf      ps
    V. Santhosh Kumar, M. J. Thazhuthaveetil, and R Govindarajan, "Exploiting Programmable Network Interfaces for Parallel Query Execution in Workstation Clusters", Proc. of the Intl. Parallel and Distributed Processing Symposium (IPDPS-06), Rhodes, Greece, April 2006.
47. HiPC-05      pdf      ps
    V. Santhosh Kumar, M. J. Thazhuthaveetil, and R Govindarajan, "Offloading Bloom Filter Operations to Network Processor for Parallel Query Processing in Cluster of Workstations", Proc. of the Intl. Conf. on High-Performance Computing (HiPC-05), Dec. 2005.
48. QEST-05      pdf      ps
    S. Govind and R. Govindarajan, "Performance Modeling and Architecture Exploration of Network Processors", in Proc. of the Intl. Conf. on Quantitative Evaluation of Systems (QEST-05), Sept. 2005.
49. ICS-05      pdf      ps
    Kaushik Rajan and R Govindarajan, "Heterogeneously Segmented Cache Architecture for a Packet Forwarding Engine", Proc. of the Intl. Conf. on Supercomputing (ICS-05), June 2005.
50. CGO-04      pdf      ps
    H. Rong, Z. Tang, R. Govindarajan, A. Douillet, and G.R. Gao Single-Dimension Software Pipelining for Multi-Dimensional Loops", in Proc. of 2004 International Symposium on Code Generation and Optimization , Palo Alto, CA, Mar. 2004. (Best Paper Award)
51. CGO-04      pdf      ps
    H. Rong, A. Douillet, R. Govindarajan, and G.R. Gao, "Code Generation for Single-Dimension Software Pipelining of Multi-Dimensional Loops", in Proc. of 2004 International Symposium on Code Generation and Optimization , Palo Alto, CA, Mar. 2004.
52. CECW-03      pdf      ps
    Uday Khedker and R. Govindrajan, "Compiler analysis and optimizations: What is new?", in Proc. of the Workshop on Cutting Edge Computing, Hyderabad, India , Dec. 2003.
53. HiPC-03      pdf      ps
    A. Radhika Sarma and R. Govindarajan, "An Efficient Web Cache Replacement Policy", in Proc. of the Intl. Conf. on High Performance Computing (HiPC-03), Hyderabad, India , Dec. 2003.
54. MSP-03      pdf      ps
    Z. Hu, Y. Xie, G.R. Gao and R. Govindarajan, "Code Size Oriented Memory Allocation for Temporary Variables", in Proc. of the 5th Workshop on Media and Streaming Processors, San Diego, CA, Dec 2003.
55. LCPC-03      pdf      ps
    H. Yang, R. Govindarajan, G.R. Gao, and Z. Hu "Compiler-Assisted Cache Replacement: Problem Formulation and Performance Ealuation", in Proc. of the 16th Workshop on Languages and Compilers for Parallel Computing, College Station, Texas, Oct. 2003.
56. SCOPES-03      ps
    V.V.N.S. Sarvani and R. Govindarajan "Unified Instruction Reordering and Algebraic Transformations for Minimum Cost Offset Assignment", in Proc. of the 7th International Workshop on. Software and Compilers for Embedded Systems (SCOPES-2003), Vienna, Austria, September 2003.
57. IPPS-03      pdf
    R. Achutharaman, R. Govindarajan, G. Hariprakash, and Amos R. Omondi, "Exploiting Java-ILP on a Simultaneous Multi-Trace Instruction Issue (SMTI) Processor", in Proc. of the Intl. Parallel and Distributed Processing Symposium (IPDPS-03), Nice, France, April. 2003.
58. MPP-03      pdf
    A. Jacquet, V. Janot, C. Leung, G.R. Gao, R. Govindarajan, and T.L. Sterling, "An Executable Analytical Performance Evaluation Approach for Early Performance Prediction", in Proc. of the Workshop on Massively Parallel Processing (MPP), Nice, France, April. 2003.
59. VLSI-03      ps
    T.S. Rajesh Kumar, R. Govindarajan, and C.P. Ravi Kumar, "Optimal Code and Data Layout in Embedded Systems", in Proc. of the Intl. Conf. on VLSI Systems, New Delhi, India , Jan. 2003.
60. HiPC-02      ps
    R. Vinodh Kumar, B. Lakshmi Narayanan, and R. Govindarajan, "Dynamic Path Profile Aided Recompilation in a JAVA Just-In-Time Compiler", in Proc. of the 9th Intl. Conf. on High Performance Computing, Bangalore, Dec. 2002.
61. COLP-02      ps
    H. Yang, R. Govindarajan, G.R. Gao, G. Cai, and Z. Hu, "Exploiting Schedule Slacks for Rate-Optimal Power-Minimum Software Pipelining", in Proc. of the Workshop on Compilers and Operating Systems for Low Power (COLP-2002), Charlottesville, Virginia, Sep. 2002.
62. CASES-02      ps
    H. Yang, G.R. Gao, C. Leung, R. Govindarajan, and H. Wu, "On Achieving Balanced Power Consumption in Software Pipelined Loops", in Proc. of the Intl. Conf. on Compilers, Architectue, and Synthesis for Embedded Systems (CASES-2002), Grenoble, France, Oct. 2002.
63. ICCD-02      ps
    H. Yang, R. Govindarajan, G.R. Gao, and K. Theobald, "Power-Performance Trade-offs for Energy-Efficient Architectures: A Quantitative Study", in Proc. of the Intl. Conference on Computer Design (ICCD-2002), Frieburg, March 2002.
64. PLDI-02(Poster) ps
    V.V.N.S. Sarvani and R. Govindarajn, "Unified Instruction Reordering and Algebraic Transformations for Minimum Cost Offset Assignment" poster presentation in ACM SIGPLAN '2002 Intl. Conf. on Programming Languages Design and Implementation (PLDI-2002), June 2002.
65. HiPC-01      ps
    K.V. Manjunath and R. Govindarajan, "Hidden Costs in Avoiding False Sharing in Software DSMs'' in Proc. of the Intl. Conf. on High Performance Computing, pp.294--304, Hyderabad, Dec. 2001.
66. ICCAD-01 ps
    G. Subash Chandar, M. Mehendale, and R. Govindarajan, "Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Reconfigurable Encoding'' in the {Proc. of the Intl. Conf. on Computer Aided Design (ICCAD-2001), San Jose, Nov.~2001.
67. IPPS-01
    R. Govindarajan, H.Yang, C. Zhang, J. N. Amaral, G.R. Gao, "Minimum Register Instruction Sequence Problem: Revisiting Optimal Code Generation for DAGs'', in Proc. of the Intl. Conf. on Parallel and Distributed Processing Symposium (IPDPS-2001), San Jose, April 2001.
68. ASAP-00
    R. Govindarajan, E.R. Altman, and G.R.Gao, "A Theory for Software-Hardware Co-Scheduling for ASIPs and Embedded Processors", in Proc. of the Intl. Conf. on Application Specific Array Processors, Boston, July 2000.
69. HiPC-99
    V. Janaki Ramanan and R. Govindarajan, "Resource Usage Modelling for Software Pipelining", Proc. of the 6th International Conference on High Performance Computing (HiPC-99), Calcutta, Dec. 1999.
70. PACT-99
    Madhavi Gopal Valluri and R. Govindarajan, "Evaluating Register Allocation and Instruction Scheduling Techniques in Out-Of-Order Issue Processors'', Proc. of the Intl. Conf. on Parallel Architectures and Compilation Techniques (PACT-99), 1999.
71. LCPC-99
    R. Govindarajan, C. Zhang, and G.R. Gao, "Minimal Register Instruction Scheduling: A New Approach for Dynamic Instruction Scheduling Processors", in Proc. of the Twelfth International Workshop on Languages and Compilers for Parallel Computing, San Diego, Aug. 1999.
72. ICS-99
    V. Janaki Ramanan and R. Govindarajan, "Resource Usage Models for Instruction Scheduling: Two New Models and a Classification'', in Proc. of the Intl. Conf. on Supercomputing (ICS-99), 1999.
73. WSSM-99
    Manoj N.P. and R. Govindarajan, "CAS-DSM: A Compiler Assisted Software Distributed Shared Memory", Proc. of the 1st Workshop on Software Distributed Shared Memory, Rhodes, June 1999.
74. WSSM-99
    V. Sricharan and R. Govindarajan, "Cache and TLB Performance in Software Distributed Shared Memory", Proc. of the 1st Workshop on Software Distributed Shared Memory, Rhodes, June 1999.
75. CC-99
    C. Zhang, R. Govindarajan, S. Ryan, and G.R. Gao, "Efficient State-Diagram Construction Methods for Software Pipelining'', in Proc. of the Compiler Construction Conference, Amsterdam, March 1999.
76. HiPC-98
    Madhavi G. Valluri and R. Govindarajan, "Modulo-Variable Expansion Sensitive Scheduling" in the Proc. of the 5th Intl. Conf. on High-Performance Computing, pp.334-341, Chennai, India, Dec. 1998. (Best Paper Award)
77. IPPS-98     
    R. Govindarajan, N.S.S. Narasimha Rao, E.R. Altman, and G.R. Gao, "An Enhanced Co-Scheduling Method using Reduced MS-State Diagram", in the Proc. of the Merged 12th International Parallel Processing Symposium and 9th International Symposium on Parallel and Distributed Systems, April 1998.
78. IPPS-98     
    A. Dani, V.J. Ramanan, and R. Govindarajan, "Register-Sensitive Software Pipelining", in the Proc. of the Merged 12th International Parallel Processing Symposium and 9th International Symposium on Parallel and Distributed Systems, April 1998.
79. HiPC-97     
    B. Hari Krishna and R. Govindarajan, "Classification and Performance Evaluation of Simultaneous Multithreaded Architectures", in the Proc. of the 4th International Conference on High-Performance Computing, pp. 34-39, Bangalore, India, Dec. 1997.
80. ICPAD-97     
    S. Ramesh, R. Lakshmi, and R. Govindarajan, "Distributed Shared Memory on IBM-SP2', in the Proc. of the International Conference on Parallel and Distributed Systems, Seoul, Korea, Dec. 1997.
81. PART-97     
    W.M. Zuberek and R. Govindarajan, "Performance Balancing in Multithreaded Multiprocessor Systems", in the Proc. of the 4th Australasian Conference on Parallel and Real-Time Systems (PART-97), Newcastle, Australia, Sept. 1997.
82. PACT-97     
    R. Silvera, J. Wang, G.R. Gao, and R. Govindarajan, "A Register Pressure Sensitive Instruction Scheduler for Dynamic Issue Processors", in the Proc. of the Internation Conference on Parallel Architectures and Compilation Techniques, San Francisco, Nov. 1997.
83. PNPM-97     
    R. Govindarajan, F. Suciu, and W. Zuberek, "Timed Petri Net Models of Multithreaded Multiprocessor Architectures", in the Proc. of the 7th International Workshop on Petri Nets and Performance Models, pp.163-172, Saint Malo, France, June 1997.
84. HiPC-96     
    R. Govindarajan and S. Rengarajan, Buffer Allocation in Regular Dataflow Networks: An Approach Based on Coloring Circular-Arc Graphs", in the Proc. of the 3rd International Conference on High-Performance Computing, pp.419-424, Trivandrum, India, Dec. 1996.
85. HPCA-96     
    R. Govindarajan, E.R. Altman, and G.R. Gao, "Co-Scheduling Hardware and Software Pipelines", in the Proc. of the Second International Symposium on High Performance Computer Architecture, February 1996.
86. HiPC-95     
    R. Govindarajan, E.R. Altman, and G.R. Gao, "Instruction Scheduling in the Presence of Structural Hazards: An Integer Programming Approach to Software Pipelining", in the Proc. of the 2nd International Conference on High-Performance Computing, New Delhi, India, pp.291-296, Dec. 1995.
87. LCPC-95     
    E.R. Altman, R. Govindarajan, and G.R. Gao, "An Experimental Study of an ILP-based Exact Solution Method for Software Pipelining", in the Proc. of the Eighth Workshop on Languages and Compilers for Parallel Computing, Columbus, OH, Aug. 1995.
88. PLDI-95     
    E.R. Altman, R. Govindarajan, and G.R. Gao, "Scheduling and Mapping: Software Pipelining in the Presence of Structural Hazards", in the Proc. of the ACM SIGPLAN Conference on Programming Language Design and Implementation, La Jolla, June 1995.
89. HPCA-95     
    R. Govindarajan, S.S. Nemawarkar, and Philip LeNir, "Design and Performance Evaluation of a Scalable Multithreaded Architecture", in the Proc. of the First International Symposium on High Performance Computer Architecture, pp.298-307, January 1995.
90. Micro-94     
    R. Govindarajan, E.R. Altman, and G.R. Gao, "Minimizing Register Requirement under Resource-Constrained Rate-Optimal Software Pipelining", in the Proc. of the 27th Annual International Symposium on Microarchitecture, pp.85-94, December 1994.
91. CONPAR-94     
    R. Govindarajan, E.R. Altman, and G.R. Gao, "A Framework for Rate-Optimal Resource-Constrained Software Pipelining", in the Proc. of the Conference on Vector and Parallel Processing, (CONPAR-94), pp. 640-651, September 1994.
92. ASAP-94     
    R. Govindarajan, G.R. Gao, and P. Desai, "Minimizing Buffer Requirement in Rate-Optimal Schedules for DSP Applications", in the Proc. of the 1994 Intl. Conference on Application-Specific Array Processors, pp. 87-98, August 1994.
93. PARLE-94     
    S.S. Nemawarkar, R. Govindarajan, G.R. Gao, and V.K. Agarwal, "Performance of Interconnection Network in Multithreaded Architectures", in the Proc. of the Parallel Architectures and Languages, Europe (PARLE-94) Conference, July 1994.
94. SPDP-93     
    S.S. Nemawarkar, R. Govindarajan, G.R. Gao, and V.. Agarwal, "Analysis of Multithreaded Multiprocessor Architectures with Distributed Shared Memory", in the Fifth IEEE Symposium on Parallel and Distributed Processing, Dallas, pp.114-121, 1993.
95. ASAP-93     
    R. Govindarajan and G.R. Gao, "A Novel Framework for Multi-Rate Scheduling in DSP Applications", in the Proc. of the 1993 Intl. Conf. on Application-Specific Array Processors, Venice, Italy, pp.77-88,1993.
96. MICRO - 25
    P. LeNir, R. Govindarajan, and S.S. Nemawarkar, "Exploiting Instruction-Level Parallelism: The Multithreaded Approach", in the Proc. of the 25th Annual Symposium on Microarchitecture, pp.189-192, Portland, December 1992.
97. SPDP-92     
    R. Govindarajan and S.S. Nemawarkar, "SMALL: A Scalable Multithreaded Architecture that Exploits Large Locality", in the Proc. of the Fourth IEEE Symposium on Parallel and Distributed Processing, pp.32-39, Dallas, December 1992.
98. COMPSAC-92
    R. Govindarajan, "Software Fault Tolerance in Functional Languages", in the Proc. of the 16th Annual International Computer Software and Applications Conference, 1992, pp.194-199, Chicago, September 1992.
99. CONPAR-VAPP-92     
    R. Govindarajan and S.S. Nemawarkar, "A Large Context Multithreaded Architecture", in the Proc. of the Joint Conference on Vector and Parallel Processing, CONPAR 92, Lyon, France, September 1992.
100. FTPDS - 92
     R. Govindarajan, "Shielded Objects: A Fresh Look at Exception Handlers in Functional Languages", in the Proc. of the 1992 Workshop on Fault-Tolerant Parallel and Distributed Systems, Boston, July 1992.
101. ICCI-92
     S. Nemawarkar, R. Govindarajan, G.R. Gao, and V.K. Agarwal, "Performance Evaluation of Latency Tolerant Architectures", in the Proc. of the 4th International Conference on Computing and Information, Toronto, pp.183-186, May 1992.
102. ICASSP-92
     G.R. Gao, R. Govindarajan, and P. Panangaden, "Well-Behaved Programs for DSP Computation", in the Proc. of the Intl. Conference on Acoustics, Speech and Signal Processing, San Francisco,pp.V.561-564, March 1992.
103. COMPSAC-91
     R. Govindarajan, L. Gou, Sheng Yu, and P. Wang, "ParC Project: Practical Constructs for Parallel Programming Languages," in the Proc. of the 15th Annual International Computer Software and Applications Conference, COMPSAC 91, pp.183-189, September 1991.
104. PARLE-91
     R. Govindarajan and Sheng Yu, "Data Flow Implementation of Generalized Guarded Commands," in Proc. of the Conference on Parallel Architectures and Languages Europe, PARLE 91, Lecture Notes in Computer Science, 505, Ed. E.H.L. Aarts, J. van Leeuwen, and M. Rem, pp.372-389, June 1991.