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Biswabandan Panda
Assistant Professor, CSE, IIT Bombay
Biswa is a faculty member at CSE, IIT Bombay.
Biswa's well-known microscopic contributions are the state-of-the-art high performing cache compressors and multi-level hardware data prefetchers. He is one of the recipients of Qualcomm Faculty Award 2022, Google India Research Award 2022, Krithi Ramamritam Award for Creative Research 2022.
Title of the talk: Pushing the limits of Hardware Prefetchers: One step at a time.
Abstract of the talk: This talk will be on recent journey on latency hiding (hardware prefetching) techniques keeping system performance, energy, and scalability aspects in mind.
We will talk about three recent works on hardware prefetching that appeared in ISCA 2020, MICRO 2022, and MICRO 2023.
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Harsh Sharma
PhD Scholar, Washington State University, USA
Harsh is currently a Ph.D. doctoral candidate in the EECS department at Washington State University Pullman under Partha Pande and Jana Doppa.
He works on AI-Driven Design and Optimization for Server-Scale Applications with general research interests are in artificial intelligence (AI) and machine learning (ML) for efficient chip design geared towards high-impact applications.
Harsh has previously worked with Dhananjay Gadre at his Lab and converged multiple projects including one of the most cited course on NPTEL in embedded systems design, an American Journal of Physics paper on science-on-stick apparatus and helped spark tinkering in 1000+ young kids from all over India at multiple venues.
Title of the talk: Accelerating the Future of Electronics and beyond.
Abstract of the talk: In this talk we delve into the dynamic and rapidly evolving state of computing, emphasizing the crucial role of computing research and system design in shaping the future as we look today.
Our journey begins by exploring the significance of a career in computing research, highlighting its transformative impact on technology and societal impacts.
We then transition to the embedded systems research and its importance in driving innovation and self-sufficiency.
Through a blend of emerging-technologies and practical application cases, the talk aims to ignite a passion for pursuing a research career.
We will dissect how cutting-edge advancements in electronics shape our immediate future and pave the way for a more sustainable, high-performance, and efficient systems and how to enable AI and ML in your current works.
To be in the center of policymaking and be a part of the upcoming Data-driven design paradigms central to 'Architecture 2.0', we need more focus in research to drive technology and policy making autonomy.
The talk underscores the importance of focused research in enabling India to take a leading role in technological policymaking and in developing its own design paradigms.
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Preeti Malakar
Assistant Professor, CSE, IIT Kanpur
Preeti Malakar is an Assistant Professor in the Department of Computer Science and Engineering, Indian Institute of Technology Kanpur.
Prior to this, she worked at the Argonne National Laboratory, USA. She graduated (Ph.D.) from the Department of Computer Science and Automation, Indian Institute of Science Bangalore.
Her research interests include scalable parallel communications, modeling and optimizing scientific workflows, parallel I/O, and application performance modeling/analysis.
Title of the talk: The Supercomputing Ecosystem.
Abstract of the talk: India has come a long way in architecting supercomputers - from about 100 MFLOPS in 1991 to 8 PFLOPS in 2023.
Today's fastest supercomputer (Frontier) has about 9 million cores and is able to process quintillion floating point operations per second.
In this talk, I will introduce you to the world of massively parallel programming.
We will delve into various realms of supercomputer infrastructure and learn basic parallel programming with a special focus on performance.
I will also briefly describe why and how a supercomputer is essential for several important scientific applications such as operational weather forecasting.
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Moumita Patra
Assistant Professor, CSE, IIT Guwahati
Dr. Moumita Patra received Ph.D. degree from the Department of Computer Science and Engineering, Indian Institute of Technology Madras, Chennai, India.
She is currently an Assistant Professor in the Department of Computer Science and Engineering, Indian Institute of Technology Guwahati, Guwahati, India. She has also worked as an Assistant Professor at IIIT Hyderabad for some time.
She has been a reviewer and TPC member of several International Conferences and Journals.
She has also received the award of Institute Pre-doctoral Fellow for her doctoral work at IIT Madras.
Her research interests include the areas of vehicular ad hoc networks, Internet of Vehicles, Unmanned Aerial Vehicles, and 5G communication networks.
Title of the talk: Envisioning the Future with Connected Vehicles.
Abstract of the talk: Efficient and safe vehicle transportation have emerged as a need in recent years and have gained interest from the research community.
A way to achieve these is by having a connected vehicles environment where vehicles are enabled with wireless connectivity to have information of their surroundings, of potential dangers, and they are able to change their behaviour accordingly.
To this direction, Internet of Vehicles (IoV) serves as a foundational building block which extends the principles of Internet of Things (IoT) to the automotive industry. IoV aims to provide safe driving with service provisioning by enabling interactions between vehicles (V2V communication), infrastructure units (V2I communication), and intra-vehicle components (V2X communication).
Depending on connectivity requirements, various access technologies, such as cellular networks (4G/5G), WiFi, satellite communication, Bluetooth, Ethernet, NFC, RFID, Dedicated Short Range Communication (DSRC), Zigbee, and LPWAN (LoRA, NB-IoT), etc. are used to connect vehicles to the Internet.
Realization of IoV leads to the emergence of many research problems including, efficient data dissemination, data processing and storage, vehicle positioning, rules and standards for IoV, and green transportation. In today's context, such issues are critical and need significant attention from the research community.
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Meenakshi D'Souza
Professor, IIIT Bangalore
Meenakshi is a Professor at IIIT-Bangalore and the Secretary cum Treasurer of ACM India.
Her research interests are in Formal Methods, Model Based Development for embedded software and Software Testing.
She is also interested in gender diversity and accessibility issues in IT. Meenakshi teaches courses on Software Testing, Automata theory and Computability, Discrete Mathematics, Graph Theory, and Design and Analysis of Algorithms in the institute.
Meenakshi's course on Software Testing has been offered on the NPTEL, Swayam platform since 2017 and more than 57,000 learners have enrolled for this course over the years.
Meenakshi also teaches in the online B. Sc. degree program of IIT Madras.
Prior to joining IIIT-Bangalore, Meenakshi worked in the research department of Honeywell Technology Solutions, Bangalore, for seven years on several applications of formal methods.
Title of the talk: Formal Verification of Industrial Safety-Critical Applications.
Abstract of the talk: Formal Verification is a highly recommended technique to verify the correctness of functional requirements of safety critical applications.
Over the past decades, several different formal verification techniques have been proposed and used for verifying safety critical applications.
In this talk, we will present the work done in collaboration with the researchers from the industry on formally verifying some real-time, industrial applications including an indigenous real-time operating system, programs controlling industrial robots and code that is run on programmable logic controllers.
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Komondoor V. Raghavan
Associate Professor, CSA, IISc Bangalore
Komondoor V Raghavan is an Associate Professor at the Department of Computer Science and Automation, Indian Institute of Science (IISc), Bangalore.
He obtained his Bachelors degree from Govt. College of Technology, Coimbatore, Masters degree from Dept. of CSE, IITB, and PhD degree from Univ. of Wisconsin-Madison.
His areas of interest are program analysis, programming tools, and formal methods for software engineering.
Title of the talk: Abstract interpretation -- a framework for program analysis and verification.
Abstract of the talk: Abstract interpretation is a technique for static analysis of programs.
The objective of any static analysis technique is to identify whether a property of interest holds across all executions of a program without running the program at all. Abstract interpretation has certain unique advantages: (1) It is a framework, in that it can be customized by a user to analyze any property of interest.
(2) It is safe, in that it declares a property as holding only if it provably holds in all possible runs of the program.
(3) Implementations of it are provided by many tools,
for various prevalent programming languages.
(4) It is efficient in practice, even on very large programs.
In this tutorial we will explore abstract interpretation by going over some examples involving it, by
taking a look at the mathematical theory underlying it, and by looking at its usage in practical settings.
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Govindarajan Ramaswamy
Professor, CSA, IISc
R. Govindarajan received his B.Sc. degree in Mathematics from Madras University in 1981 and B.E. (Electronics and Communication) and Ph.D. (Computer Science) degrees from the Indian Institute of Science,Bangalore in 1984 and 1989 respectively.
He has held postdoctoral research positions and visiting faculty positions at Universities in USA and Canada.
Since 1995, he has been with the Supercomputer Education and Research Centre and the Department of Computer Science and Automation, Indian Institute of Science, Bangalore.
His research interests are in the areas of High Performance Computing, Compilation Techniques, and Computer Architecture.
He has more than 135 research publications in international journals and refereed conferences.
He is a fellow of the Indian National Academy of Engineering, Senior Member of IEEE, and a Distinguished Member of ACM.
Title of the talk: Compiler Research meets Machine Learning.
Abstract of the talk: As the title says, this talk is all about compiler research meeting machine learning, It will discuss both aspects of the problem: How compiler optimizations can benefit from machine learning models and how compiler optimizations can improve the performance of machine learning models, especially in ML inferencing.
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Joycee M. Mekie
Associate Professor, EE, IIT Gandhinagar
Joycee Mekie is an Associate Professor at the Indian Institute of Technology Gandhinagar. She has been a faculty for the past 13 years. Prior to joining IIT Gandhinagar, she did her PhD from IIT Bombay, and Masters and Bachelors from the M. S. University of Baroda. He is the recipient of the Young Faculty Research Fellowship (YFRF) from MEITY under the Vivesvaraya PhD scheme, and Excellence in Teaching award 2023 from IIT Gandhinagar. She has guided several Bachelors, Masters and PhD students during her tenure. Her research interests include Computation in Memory in SRAMs, Hardware Accelerator design, Memory system design, Processor design, etc.
Title of the talk: Computation In Memory for Accelerating ML workloads.
Abstract of the talk: Computation In Memory (CIM) has emerged as one of the interesting approaches toward Hardware acceleration of ML workloads. These data and compute intensive workloads benefit extensively by merging compute units with data storage (memory).
We have explored several approaches to deal with Computation in Cache memory.
We will present some of these approaches, the practical issues faced in implementing these CIM approaches, solutions of some of these practical challenges, and the future of CIM approaches.
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Karthik Ramachandra
Group Engg. Manager, Azure SQL, Microsoft
Karthik Ramachandra currently heads the Microsoft SQL Server and Azure SQL Database R&D Organization in India.
Prior to this he was a researcher at Microsoft Research India and Microsoft Gray Systems Lab, Madison WI.
He holds a Ph.D from IIT Bombay, India, where his doctoral thesis won an honorable mention for the 2015 ACM SIGMOD Jim Gray Doctoral Dissertation Award and the IIT Bombay Excellence in Ph.D Research Award 2015.
His doctoral work was supported by the MSR India PhD Fellowship 2011 and the Yahoo! Key scientific challenges award 2011.
His areas of research include query processing and optimization in large scale databases and data management systems, Big-data systems, cloud database-as-a-service and the intersection of databases and compilers/programming languages.
Title of the talk: Cloud Database Systems: Challenges and Opportunities.
Abstract of the talk: Database Systems is a relatively mature area of computer science research, which has resulted in sophisticated products that are robust, high-performing, and widely used. However, the emergence and popularity of the cloud as the mainstream computing platform, has caused immense disruption in this area, rendering the traditional database design to be incapable of addressing modern applications.
This has resulted in a fundamental rethinking and redesigning of database systems, by questioning some of the basic assumptions and system design principles that were originally used in database system design and implementation.
This talk will take the audience through this ongoing transformational journey of cloud database systems, and thereby highlight some of the many exciting challenges and research opportunities in designing a database system in the age of AI.
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Devashree Tripathy
Assistant Professor, CSE, IIT Bhubaneswar
Dr. Devashree Tripathy is an Assistant Professor in Computer Science and Engineering at Indian Institute of Technology, Bhubaneswar.
Her research spans in Computer Architecture , High Performance Computing, Fault-Tolerance systems, performance and power-efficient designs for accelerators, and Machine Learning.
Her current research focuses on ML for Systems and Systems for ML.
Prior to joining IIT Bhubaneswar, Dr. Tripathy was a Postdoctoral Fellow in Computer Science at Harvard University in Harvard Architecture, Circuits, and Compilers Group.
She worked as an Associate with Harvard University.
She graduated from University of California, Riverside with PhD in Computer Science.
Title of the talk: Designing Efficient Heterogeneous Systems.
Abstract of the talk: The future of high performance and energy efficient computing is heterogeneous computing i.e. using the right processor, in right configuration, in the right place, at the right time.
Driven by the pace of Moore's Law accompanied by Dennard scaling, the general-purpose computing has been dominant since last 5 decades.
However, as this trajectory is changing due to slow down of Dennard scaling, it has become more challenging to achieve the high performance from the generalized hardware, thereby shifting the focus of the architecture community towards the specialized hardware i.e. Domain-Specific System on Chip (DSSoC).
DSSoCs bag the virtues of the general-purpose processors (flexible, programmable) as well as application-specific integrated circuits (ASICs) in terms of efficient computing through specialized processing.
DSSoC are heterogeneous system-on-chip (SoC) comprising of several cores that are a optimized mix of general purpose processors, special purpose processors, hardware accelerators, memory and input/output devices.
They are meant to significantly improve the performance in terms of latency and throughput for the applications pertaining to a specific domain. DSSoCs have a wide range of usage starting from Autonomous cars, drones to Augmented and Virtual reality.
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Yogesh Simmhan
Associate Professor, CDS, IISc
Yogesh Simmhan is an Associate Professor in the Department of Computational and Data Sciences and a Swarna Jayanti Fellow at the Indian Institute of Science, Bangalore.
His research explores scalable software platforms, algorithms and applications on distributed systems.
He has published over 100 peer-reviewed papers, and won the Best Paper Award at IEEE International Conference on Cloud Computing (CLOUD) 2019, IEEE TCSC SCALE Challenge Award in 2019 and 2012, and the Distinguished Paper award at EuroPar 2018.
He is the recipient of the IEEE TCSC Award for Excellence in Scalable Computing (Mid Career Researcher) in 2020.
He is an Associate Editor-in-Chief of the Journal of Parallel and Distributed Systems (JPDC) and an Associate Editor of Future Generation Computing System (FGCS).
Yogesh has a Ph.D. in Computer Science from Indiana University, Bloomington, and was previously a Research Assistant Professor at the University of Southern California (USC), Los Angeles, and a Postdoc at Microsoft Research, San Francisco.
He is a Distinguished Member of ACM, a Distinguished Contributor of the IEEE Computer Society and serves on the ACM India Executive Council.
Title of the talk: Distributed Programmable Platforms Across Edge and Cloud Computing.
Abstract of the talk: The growth of distributed computing infrastructure, within and across cloud data centers, and among edge devices spanning mobile and edge devices, motivates the need for distributed programming abstractions that can seamless be used to design contemporary enterprise and ML applications, which then execute efficiently and reliably across such diverse computing systems.
This talk will discuss our work on XFaaS, a dataflow composition model and execution platform for hybrid cloud and edge environments.
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Sarani Bhattacharya
Assistant Professor, CSE, IIT Kharagpur
Sarani Bhattacharya has recently joined as an Assistant Professor in the Department of Computer Science and Engineering, IIT Kharagpur.
Before joining there, she was working for 2 years with a group of Computer Architects and Researchers in imec, Belgium.
She has a Ph.D from IIT Kharagpur and she comes from a background of micro-architectural security. Apart from this, she also has a post-doctoral experience in COSIC, KU Leuven.
Title of the talk: Micro-architectural Security and Trust: An Introduction to Secure System Architecture:
Abstract of the talk: As the ubiquity of computing systems continues to expand across diverse domains, the need for robust security mechanisms to safeguard sensitive information and ensure system trustworthiness becomes increasingly critical.
This research delves into the realm of micro-architectural security, aiming to provide an insightful introduction to secure system architecture.
The study explores the intricate interplay between hardware design, micro-architectural features, and the establishment of trust in computing environments.
Beginning with an examination of fundamental concepts in micro-architecture, the research elucidates the role of hardware in shaping the security posture of a system.
It explores various vulnerabilities inherent in micro-architectural elements and analyzes their implications on overall system security.
Emphasis is placed on understanding how attackers exploit these vulnerabilities to compromise the confidentiality, integrity, and availability of data.
Furthermore, the research investigates contemporary methodologies employed to fortify micro-architectural components against potential threats. This includes the exploration of secure enclave technologies, hardware-based security primitives, and the integration of cryptographic techniques at the micro-architectural level.
The study aims to provide a comprehensive overview of the state-of-the-art practices in designing secure micro-architectures.
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Anasua Bhowmik
Fellow Silicon Design Engineer, AMD
Anasua Bhowmik is a Fellow Silicon Design Engineer at Advanced Micro Devices.
She leads the processor architecture and performance modeling team at AMD India Design Center in Bangalore.
She has 20 years of experience in high performance CPU micro-architecture development and been with AMD since 2005.
She has made significant contributions to the design of many generations of microprocessors from AMD including AMD's highly successful Ryzen and Epyc lines of processors.
Currently she is the performance lead for AMD's next generation microprocessor. Prior to joining AMD, she worked as a research scientist at Indian Institute of Science.
She has received Masters in Computer Science and Automation from Indian Institute of Science and PhD in Computer Science from University of Maryland, College Park.
Title of the talk: Designing AMD CPUs for High Performance Computing Leadership
Abstract of the talk: Microprocessors are playing a central role in this era of exponential growth in computing.
CPU designs are becoming increasingly complex as they evolve in response to the demanding performance requirements of existing and emerging applications and deployment models (e.g. cloud services, HPC).
AMD is at the forefront of the high-performance CPU design and is delivering leadership performance with Ryzen and EPYC series of CPUs.
This talk will provide an overview of AMD's latest CPU microarchitecture and discuss the challenges of designing high performance CPUs for the fast-evolving applications and design space. It will also provide an overview of the methodology used by us for designing high performance CPUs.
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Sreeju G R
Project Manager, C-DAC Trivandrum
Sreeju G R is a embedded systems professional with 15+ years of experience in Firmware design, development, debugging and field trials on ARM, MSP430 based micro
controllers and RISC-V based Microprocessor using Embedded C and Assembly languages.
Currently working as Project Manager at CDAC in the Microprocessor
Development Programme (MDP) initiated and funded by MeitY with the mission objective to design and develop indigenously, a family of Microprocessors.
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Himanshu Diwane
Project Engineer, C-DAC Trivandrum
Himanshu Diwane is a Project Engineer at CDAC, Trivandrum, graduated from Prof. Ram Meghe Institute of Research and Technology, Amravati, Maharashtra.
He has 1.5+ years of experience in software development, primarily focused on C/C++ embedded firmware development, with a specific emphasis on VEGA Processor ecosystem development.
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Prakash Raghavendra
Senior Fellow, AMD
Prakash Raghavendra completed his PhD in 1998 from CSA, IISc, Bangalore.
He has worked in HPE and Adobe before joining AMD
in 2012.
Since 2012, Prakash has been working in the areas of Compilers, Optimizing Deep Learning stack on AMD server products.
Title of the talk: AMD technology thrusts and collaboration opportunities.
Abstract of the talk: In this talk, we will start with a broad view of the AMD technology portfolio.
We will then delve deeper into a couple of key challenges and collaboration opportunities in the datacenter space- Power efficiency, memory subsystem evolution with CXL, domain specific accelerators
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Dheemanth Nagaraj
Senior Fellow, AMD
Dheemanth Nagaraj is the lead CPU Product Architect in the Server Business Unit at AMD. Prior to that, he was a Fellow at the Datacenter & AI group at Intel.
His focus has been on delivering datacenter computing solutions encompassing CPUs, Accelerators and System components.
Title of the talk: AMD technology thrusts and collaboration opportunities.
Abstract of the talk: In this talk, we will start with a broad view of the AMD technology portfolio.
We will then delve deeper into a couple of key challenges and collaboration opportunities in the datacenter space- Power efficiency, memory subsystem evolution with CXL, domain specific accelerators.
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