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Designing CPUs For Leadership High-Performance Computing

Series: Department Seminar

Speaker: Dr. Anasua Bhowmik Dr. Kanishka Lahiri

Date/Time: Oct 29 11:00:00


Faculty Advisor:

Microprocessors are playing a central role in this era of exponential growth in computing. CPU designs are becoming increasingly complex as they evolve in response to the demanding performance requirements of existing and emerging applications and deployment models (e.g. cloud services). AMD is at the forefront of the high-performance CPU design and is delivering leadership performance with Ryzen and EPYC series of CPUs for the client and server markets respectively. In this talk, we will provide an overview of AMD’s CPU microarchitecture and discuss some of the problems we are working on to further improve CPU performance. We will also discuss the process and challenges of designing high-performance CPUs for the fast-evolving application and design space, highlighting problems related to microarchitecture, simulation technology, workload sampling, and performance projections.

Speaker Bio:
Dr. Anasua Bhowmik is a Fellow Silicon Design Engineer at Advanced Micro Devices. She leads the processor architecture and performance modelling team at AMD India Design Centre in Bangalore. She has 20 years of experience in high performance CPU micro-architecture development and been with AMD since 2005. She has made significant contributions to the design of many generations of microprocessors from AMD including AMD’s highly successful Ryzen and Epyc lines of processors. Currently, she is the performance lead for AMD’s next generation microprocessor. Prior to joining AMD, she worked as a research scientist at Indian Institute of Science. She has received BE in Computer Science and Engineering from Jadavpur University, Masters in Computer Science and Automation from Indian Institute of Science and PhD in Computer Science from University of Maryland, College Park.

Dr. Kanishka Lahiri is a Fellow in AMD’s Server Performance Group (SPG) where he works on performance architecture of AMD’s EPYC series of processors, and leads it’s India team. His areas of expertise include workload characterization, performance analysis tools & methodology, and CPU/SoC performance architecture. Prior to joining AMD in 2008, he worked at Montalvo Systems on the front-end of a new x86 CPU design, and at NEC Laboratories America where he conducted research on SoC design methodology. He obtained his PhD in Computer Engineering from UC San Diego in 2003 and a B.Tech in Computer Science & Engineering from IIT Kharagpur in 1998.

Host Faculty: Arkaprava Basu