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View all Seminars | Download ICal for this eventµIRs-Intermediate Representation for Agile Design of Accelerators
Series: Department Seminar
Speaker: Prof. Arrvindh Shriraman, Simon Fraser University, Canada
Date/Time: Feb 03 11:00:00
Location: CSA Seminar Hall (Room No. 254, First Floor)
Abstract:
Creating high quality application-specific accelerators requires us to make iterative changes to both algorithm behavior and microarchitecture, and this is a tedious and error-prone process. We propose a generalized intermediate representation for describing accelerator microarchitecture, μIR, and an associated pass framework, μopt. μIR represents the accelerator as a concurrent structural graph in which the components roughly correspond to microarchitecture level hardware blocks (e.g., function units, network, memory banks). There are two important benefits i) it decouples microarchitecture optimizations from algorithm/program optimizations. ii) it decouples microarchitecture optimizations from the RTL generation. Computer architects express their ideas as a set of iterative transformations of the μIR graph that successively refine the accelerator architecture. The μIR graph is then translated to Chisel, while maintaining the execution model and cycle-level performance characteristics. We study three broad classes of optimizations: Timing (e.g., Pipeline re-timing), Spatial (e.g., Compute tiling), and Higher-order Ops (e.g., Tensor function units) that deliver between 1.5 ?? 8? improvement in performance; overall 5??20? speedup compared to an ARM A9 1Ghz.
Speaker Bio:
Dr. Shriraman is an associate professor at Simon Fraser University. His work on synchronization has influenced the design of hardware concurrency in multicores from AMD and IBM. He was awarded an IBM Faculty Award for his research contributions to memory models in accelerators. His recent research focuses on tools to help with incorporating hardware accelerators into mainstream computing and creating infrastructure for teaching hardware-software co-design to CS majors.
Host Faculty: R Govindarajan