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VLSI DFX for AV

Series: Department Seminar

Speaker: Dr. Rajagopalan (Gopal) Srinivasan,Senior Principal Architect (retired), Nvidia Corp.

Date/Time: Mar 02 11:00:00

Location: CSA Auditorium, (Room No. 104, Ground Floor)

Abstract:
Very Large-Scale Integration (VLSI) methodology and manufacturing process have grown rapidly in the last few decades enabling us to design and encapsulate billions of transistors in single mammoth chips. Design for Excellence (DFX) such as - Design for Functional Safety (DFS), Design for Testability (DFT), and Design for Manufacturing (DFM) - encompass several aspects of VLSI methodology and manufacturing process towards realizing these System-on-Chips (SoCs)

Autonomous Vehicles (AV) are beginning to surface up in the streets of USA, Europe, & Asia. These self-driving vehicles are equipped with a variety of sensors to perceive the surroundings, obstructions, and traffic signs. Real-time processing and decision-making for these AVs are implemented by powerful GPU based SoCs. VLSI DFX plays a very important role in realizing these SoCs from design concept-to-tapeout.

In this talk, we will introduce design features of AV vehicles, and the GPU based SoCs that forms the cockpit for these AV vehicles. We will delve into Functional Safety aspects implemented on these GPUs and SoCs. We will also introduce the International Standards Organization (ISO) mandate for Functional Safety in AVs and the need for its compliance.

Speaker Bio:
Rajagopalan (Gopal) Srinivasan has recently retired from the technical management aspects of functional safety engineering for GPUs at Nvidia Corporation. Prior to this position, he led the DFT aspects for all Nvidia CPUs and their associated SoCs Gopal has more than 30 years of extensive technical design and management experience having worked for various organizations -

  • Nvidia Corp., Santa Clara, CA
  • Intel Corp., Folsom, CA & Morganville, NJ
  • Lucent Bell Labs (now Nokia Labs) at Murray Hill & Princeton, NJ
  • Stanford University Network (SUN) Microsystems (now Oracle Corp.) Menlo Park, CA
  • Texas Instruments (TI), Bangalore, KA

    • Gopal received his
    B. Tech in Electronics from the Indian Institute of Technology, Madras
  • M.E. in Computer Science & Communications from the Indian Institute of Science, Bangalore
  • M.S. & Ph.D. in Computer Engineering from the University of Southern California, Los Angeles.

    • Gopal has published several technical papers and articles in IEEE/ACM Conferences and Transactions. He was active on several Technical Program Committees for various International Conferences. He has represented Nvidia, Intel & Bell Labs in several Technical Panels, Tutorials and Workshops.

    Host Faculty: Prof. Vinod Ganapathy